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Message-Id: <201304181138.13599.arnd@arndb.de>
Date: Thu, 18 Apr 2013 11:38:13 +0200
From: Arnd Bergmann <arnd@...db.de>
To: "Uwe Kleine-König"
<u.kleine-koenig@...gutronix.de>
Cc: Thomas Gleixner <tglx@...utronix.de>, kernel@...gutronix.de,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
Jonathan Austin <jonathan.austin@....com>,
Catalin Marinas <catalin.marinas@....com>
Subject: Re: [PATCH v3] irqchip: Add support for ARMv7-M's NVIC
On Thursday 18 April 2013, Uwe Kleine-König wrote:
> That is, there are (INTLINESNUM + 1) * 32 irqs for INTLINESNUM < 15. For
> INTLINESNUM == 15 there are only 496 and not 16 * 32 == 512. That's the
> same on the gic (just with bigger numbers).
Ok, but since you are now using a linear domain, it doesn't actually hurt
to register 512 in that special case, right?
Arnd
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