linux-kernel - Re: [PATCH v3b 0/9] refactoring for mask

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Message-ID: <516FFCB5.7080900@keymile.com>
Date:	Thu, 18 Apr 2013 16:01:25 +0200
From:	Gerlando Falauto <gerlando.falauto@...mile.com>
To:	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
CC:	Jason Cooper <jason@...edaemon.net>, Andrew Lunn <andrew@...n.ch>,
	Russell King <linux@....linux.org.uk>,
	Ben Dooks <ben-linux@...ff.org>,
	Kukjin Kim <kgene.kim@...sung.com>,
	Ralf Baechle <ralf@...ux-mips.org>,
	Grant Likely <grant.likely@...retlab.ca>,
	Linus Walleij <linus.walleij@...aro.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Simon Guinot <sguinot@...ie.com>
Subject: Re: [PATCH v3b 0/9] refactoring for mask_cache

Hi everyone,

any chance we could move this pachset to the next level (at least for 
mainline)?

Thanks a lot!
Gerlando

On 03/21/2013 06:12 PM, Gerlando Falauto wrote:
> This patchset addresses a regression found with the Orion GPIO controller
> when both Edge- and Level- based interrupts are requested within the same
> GPIO chip. The regression was introduced by e59347a
> "arm: orion: Use generic irq chip"
>
> thereby affecting all kernel releases since 3.0.x.
>
> The reason behind it is that the Orion GPIO controller uses separate
> mask registers for the two types of interrupts (one for edge and one
> for level), whereas in other cases the same register would be shared.
> Since this mask register is cached, we need to have (potentially)
> separate register caches.
> We do that by adding a per-chip-type mask register cache, and a mask cache
> pointer (which will point either to that or the shared one).
>
> So we proceed with incremental stages:
> a) we introduce the new fields and pointer (though only the shared one is used)
> b) we convert all drivers to use it
> c) we rename the field so to force the use of the per-ct pointer
> d) we add per-ct mask cache, provided the new flag
>     IRQ_GC_SEPARATE_MASK_REGISTERS is enabled
> e) we enable the flag for orion-gpio and mvebu drivers
>
> The changes were tested by Simon Guinot to be effective on Kirkwood chipsets,
> on both the legacy orion-gpio and the new gpio-mvebu drivers.
> The bug should also affect the other two Marvell variants handled by
> the gpio-mvebu driver.
>
> Changes from v3: cover letter and SOB lines.
>
> Gerlando Falauto (9):
>    genirq: cosmetic: remove cur_regs
>    genirq: add mask_cache and pmask_cache into struct irq_chip_type
>    gpio: mvebu: convert to usage of *pmask_cache within irq_chip_type
>    MIPS: JZ4740: convert to usage of *pmask_cache within irq_chip_type
>    ARM: SAMSUNG: convert to usage of *pmask_cache within irq_chip_type
>    genirq: rename mask_cache to shared_mask_cache
>    genirq: handle separate mask registers
>    orion-gpio: enable IRQ_GC_SEPARATE_MASK_REGISTERS
>    gpio: mvebu: enable IRQ_GC_SEPARATE_MASK_REGISTERS
>
>   arch/arm/plat-orion/gpio.c            |    3 +-
>   arch/arm/plat-samsung/irq-vic-timer.c |    6 ++--
>   arch/mips/jz4740/irq.c                |    3 +-
>   drivers/gpio/gpio-mvebu.c             |   23 ++++++++------
>   include/linux/irq.h                   |    9 ++++--
>   kernel/irq/generic-chip.c             |   55 +++++++++++++++++++++------------
>   6 files changed, 64 insertions(+), 35 deletions(-)
>

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