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Message-ID: <1366374436.24945.6.camel@laptop>
Date: Fri, 19 Apr 2013 14:27:16 +0200
From: Peter Zijlstra <a.p.zijlstra@...llo.nl>
To: Jacob Shin <jacob.shin@....com>
Cc: Ingo Molnar <mingo@...hat.com>,
Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
"H. Peter Anvin" <hpa@...or.com>,
Thomas Gleixner <tglx@...utronix.de>, x86@...nel.org,
Stephane Eranian <eranian@...gle.com>,
Jiri Olsa <jolsa@...hat.com>, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 2/2] perf, amd: support for AMD NB and L2I "uncore"
counters.
On Thu, 2013-04-18 at 11:33 -0500, Jacob Shin wrote:
> Okay, here is V2 which does that. Thanks again in advance for taking
> the time to look it over.
Awesome, looks good on a first read.. I'm assuming you've tested things
and they actually work too? :-)
> From d68225744196d8b0d60a1bc33ae9abdbffbd9bc9 Mon Sep 17 00:00:00 2001
> From: Jacob Shin <jacob.shin@....com>
> Date: Sun, 14 Apr 2013 04:12:42 -0500
> Subject: [PATCH 2/2] perf, amd: support for AMD NB and L2I "uncore" counters.
>
> Add support for AMD Family 15h [and above] northbridge performance
> counters. MSRs 0xc0010240 ~ 0xc0010247 are shared across all cores
> that share a common northbridge.
>
> Add support for AMD Family 16h L2 performance counters. MSRs
> 0xc0010230 ~ 0xc0010237 are shared across all cores that share a
> common L2 cache.
>
> We do not enable counter overflow interrupts. Sampling mode and
> per-thread events are not supported.
>
> Signed-off-by: Jacob Shin <jacob.shin@....com>
Acked-by: Peter Zijlstra <a.p.zijlstra@...llo.nl>
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