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Message-ID: <CA+55aFwDGyHOzu=Qh7SJOBK6QvAwAh7pMDL6LfMUE=AW_kapAw@mail.gmail.com>
Date:	Thu, 2 May 2013 09:45:08 -0700
From:	Linus Torvalds <torvalds@...ux-foundation.org>
To:	Ralf Baechle <ralf@...ux-mips.org>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	Jonas Gorski <jogo@...nwrt.org>, eunb.song@...sung.com,
	"linux-mips@...ux-mips.org" <linux-mips@...ux-mips.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] MIPS: Enable interrupts in arch_cpu_idle()

On Thu, May 2, 2013 at 7:58 AM, Ralf Baechle <ralf@...ux-mips.org> wrote:
>
> For a while we just used to live with the race condition resulting from
> not disabling interrupts in the idle loop.  Then c65a5480 fixed this by
> checking if we're returning to the WAIT instruction in the idle loop
> when returning from an interrupt and iff so, rolling back the
> program counter to point to the if (test_thread_flag(TIF_NEED_RESCHED))
> test at the beginning of rollback_r4k_wait.

Umm. That sounds buggy. What if there was an interrupt *between* the
two places, not right at the wait instruction?

It seriously sounds like MIPS should do this by enabling interrupts in
the *assembly* code immediately preceding the wait instruction. IOW,
you'd effectively have the same kind of "sti; halt" kind of sequence
that x86 has. Not "enable interrupts" + C compiler puts random
instructions here + "wait".

                       Linus
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