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Date:	Mon, 6 May 2013 15:20:21 -0700
From:	Bin Gao <bin.gao@...ux.intel.com>
To:	Bjorn Helgaas <bhelgaas@...gle.com>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	"H. Peter Anvin" <hpa@...or.com>,
	"x86@...nel.org" <x86@...nel.org>,
	Jacob Pan <jacob.jun.pan@...ux.intel.com>,
	Jesse Barnes <jbarnes@...tuousgeek.org>,
	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: x86/pci/mrst: force all pci config toward 0:0:0, 0:2:0 and 0:3:0
 to type 1

On Mon, May 06, 2013 at 10:38:55AM -0700, Bjorn Helgaas wrote:
> Please use the conventional Linux PCI address formatting
> (DDDD:BB:dd.f, where DDDD = domain (optional, often omitted if DDDD ==
> 0), BB = bus, dd = device, f = function), because this is quite
> confusing.
Yes, will do.

> You say "0:2:0 and 0:3:0" are behind the bridge "0:0:0", but the patch
> you sent clearly applies only to devices on bus 0.  The patch applies
> to devices 00:00.0, 00:02.0, and 00:03.0.  These are all on the same
> bus, so none of them can be behind a bridge.
Sorry my bad, "behind" could be confusing(or wrong:-)).
0000:00:00.0 is the host bridge, 0000:00:02.0 and 0000:00:03.0 are
the 2 devices on bus 00. So these 3 devides are on the same bus.

> If the 00:00.0 device is in fact a bridge, its secondary bus will be
> something other than 0, so any devices behind the bridge will be on a
> non-zero bus number.  And I assume you would want to use config
> mechanism #1 to reach those devices, too.  Your current patch doesn't
> do that -- it only applies to devices on bus 0.
No pci-pci bridge, no secondary bus (see above explanation).
0000:00:00.0 (host bridge), 0000:00:02.0 and 0000:00:03.0 are the only
3 real pci devices in the chip.
 
> I dropped this patch until this gets straightened out.
Will re-submit together with other cleanup for the same file. Thanks.
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