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Message-ID: <CABPqkBREmUfuPBvCvBF+4YNvzfuqgDffVvfUFE5_w6Yx88mBZQ@mail.gmail.com>
Date:	Tue, 7 May 2013 00:43:04 +0200
From:	Stephane Eranian <eranian@...gle.com>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	Andi Kleen <andi@...stfloor.org>, Ingo Molnar <mingo@...nel.org>,
	LKML <linux-kernel@...r.kernel.org>, stable@...r.kernel.org,
	Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 2/2] perf, x86: Don't allow unusual PEBS raw flags

On Mon, May 6, 2013 at 8:52 PM, Peter Zijlstra <peterz@...radead.org> wrote:
> On Mon, May 06, 2013 at 07:44:19PM +0200, Stephane Eranian wrote:
>> On Thu, May 2, 2013 at 9:37 AM, Peter Zijlstra <peterz@...radead.org> wrote:
>> > On Wed, Apr 24, 2013 at 04:04:54PM -0700, Andi Kleen wrote:
>> >> From: Andi Kleen <ak@...ux.intel.com>
>> >>
>> >> The PEBS documentation in the Intel SDM 18.6.1.1 states:
>> >>
>> >> """
>> >> PEBS events are only valid when the following fields of IA32_PERFEVTSELx are all
>> >> zero: AnyThread, Edge, Invert, CMask.
>> >> """
>> >>
>> >> Since we had problems with this earlier, don't allow cmask, any, edge, invert
>> >> as raw events, except for the ones explicitly listed as pebs_aliases.
>> >
>> > If its a simple matter of crap in crap out without affecting anything else we
>> > shouldn't do anything.
>> >
>> The problem here is that you are sampling an instruction which did not cause
>> the event you are measuring. Remember that using cmask, changes the
>> nature of what's being measured (from event to cycles).
>
> Yeah.. I don't see the problem though. If you're using cmask and the like
> you're supposed to know wth you're doing; which includes knowing your cpu and
> what it thinks of such an event.
>
But that implies that you'd know that on Intel precise mode uses PEBS
and that PEBS
does not take cmask events. That seems to contradict the philosophy of
perf_events
where the kernel does the work for you.

> The only reason to disallow events is if they (badly) interact with other
> counters.
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