| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Tue, 7 May 2013 16:18:12 +0200 From: Jiri Slaby <jslaby@...e.cz> To: jirislaby@...il.com Cc: linux-kernel@...r.kernel.org, Takashi Iwai <tiwai@...e.de>, <stable@...r.kernel.org>, Jiri Slaby <jslaby@...e.cz>, David Airlie <airlied@...ux.ie>, dri-devel@...ts.freedesktop.org Subject: [PATCH 04/15] drm/cirrus: Correct register values for 16bpp From: Takashi Iwai <tiwai@...e.de> When the mode is set with 16bpp on QEMU, the output gets totally broken. The culprit is the bogus register values set for 16bpp, which was likely copied from from a wrong place. References: https://bugzilla.novell.com/show_bug.cgi?id=799216 Cc: <stable@...r.kernel.org> Signed-off-by: Takashi Iwai <tiwai@...e.de> Signed-off-by: Jiri Slaby <jslaby@...e.cz> Cc: David Airlie <airlied@...ux.ie> Cc: dri-devel@...ts.freedesktop.org --- drivers/gpu/drm/cirrus/cirrus_mode.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/cirrus/cirrus_mode.c b/drivers/gpu/drm/cirrus/cirrus_mode.c index 60685b21..379a47e 100644 --- a/drivers/gpu/drm/cirrus/cirrus_mode.c +++ b/drivers/gpu/drm/cirrus/cirrus_mode.c @@ -273,8 +273,8 @@ static int cirrus_crtc_mode_set(struct drm_crtc *crtc, sr07 |= 0x11; break; case 16: - sr07 |= 0xc1; - hdr = 0xc0; + sr07 |= 0x17; + hdr = 0xc1; break; case 24: sr07 |= 0x15; -- 1.8.2.1 -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists