linux-kernel - Re: [PATCH 3/4] ARM: dts: tegra: Correct PCIe entry

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Wed, 08 May 2013 10:56:34 -0600
From:	Stephen Warren <swarren@...dotorg.org>
To:	Jay Agarwal <jagarwal@...dia.com>
CC:	linux@....linux.org.uk, thierry.reding@...onic-design.de,
	ldewangan@...dia.com, bhelgaas@...gle.com, olof@...om.net,
	hdoyu@...dia.com, pgaikwad@...dia.com, mturquette@...aro.org,
	pdeschrijver@...dia.com, linux-arm-kernel@...ts.infradead.org,
	linux-tegra@...r.kernel.org, linux-kernel@...r.kernel.org,
	linux-pci@...r.kernel.org, jtukkinen@...dia.com, kthota@...dia.com
Subject: Re: [PATCH 3/4] ARM: dts: tegra: Correct PCIe entry

On 05/08/2013 04:57 AM, Jay Agarwal wrote:
> - Add interrupt-names property
> - Correct downstream I/O size
> - Correct cml clock name for Tegra30
> - Patch is based on remotes/gitorious_thierryreding_linux/tegra/next
> - and should be applied on top of this.

Another change that needs to be made to this file (probably as a
separate change that Thierry can squash into one of his earlier changes)
is to move the pcie-controller node; it is currently not in the correct
place in the .dtsi file; it's not sorted by reg addresss.

> diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi

>  		clocks = <&tegra_car 70>, <&tegra_car 72>, <&tegra_car 74>,
>  			 <&tegra_car 118>, <&tegra_car 215>;
> -		clock-names = "pex", "afi", "pcie_xclk", "pll_e", "cml";
> +		clock-names = "pex", "afi", "pcie_xclk", "pll_e", "cml0";

You could drop that change if the driver named the clock "cml" rather
than "cml0", which as I explained in my previous email seems like a good
idea anyway.

Applying the same reasoning, I wonder if for Tegra 20 too, the PCIe
driver shouldn't expect clock names of just "xclk" and "pll" rather than
"pcie_xclk" and "pll_e".
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/