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Message-ID: <20130510141526.GA6755@ioremap.net>
Date:	Fri, 10 May 2013 18:15:27 +0400
From:	Evgeniy Polyakov <zbr@...emap.net>
To:	Jean-François Dagenais <jeff.dagenais@...il.com>
Cc:	Andrew Morton <akpm@...ux-foundation.org>,
	linux-kernel@...r.kernel.org, Greg KH <greg@...ah.com>
Subject: Re: [PATCH V2] w1: ds2408: add magic sequence to disable P0 test
 mode

On Thu, May 09, 2013 at 03:33:23PM -0400, Jean-François Dagenais (jeff.dagenais@...il.com) wrote:
> To be honest, I didn't really thought about it that much, I just copy pasted that from Evgeniy Polyakov's hunk at drivers/w1/w1_io.c, function w1_reset_select_slave(struct w1_slave *sl) exept I changed the MATCH_ROM with magic 0x96 and appended magic 0x3C. I have tested it only on the available platform I have which is x86. I agree it looks dodgy. Do you have an alternative? You are certainly more familiar with the kernel's fancy bit and endian tools than I am. I'd be willing to test prior to sending V3.
> 
> 
> struct w1_reg_num
> {
> #if defined(__LITTLE_ENDIAN_BITFIELD)
> 	__u64	family:8,
> 		id:48,
> 		crc:8;
> #elif defined(__BIG_ENDIAN_BITFIELD)
> 	__u64	crc:8,
> 		id:48,
> 		family:8;
> #else
> #error "Please fix <asm/byteorder.h>"
> #endif
> };
> 
> On the wire, the family byte should be sent first, then the MSB of id, then the rest of id and finally the crc.
> 
> Perhaps Evgeniy can chime in here?

That's transform is only used to cast structure to uint64_t, nothing
fancy. In-memory structure should be ok because of above definition on
every endian.

-- 
	Evgeniy Polyakov
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