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Date:	Tue, 14 May 2013 21:51:10 +1000
From:	Daniel Tang <dt.tangr@...il.com>
To:	Linus Walleij <linus.walleij@...aro.org>
Cc:	Thomas Gleixner <tglx@...utronix.de>,
	John Stultz <john.stultz@...aro.org>,
	"linux-arm-kernel@...ts.infradead.org" 
	<linux-arm-kernel@...ts.infradead.org>,
	Russell King - ARM Linux <linux@....linux.org.uk>,
	Arnd Bergmann <arnd@...db.de>,
	"fabian@...ter-vogt.de Vogt" <fabian@...ter-vogt.de>,
	Lionel Debroux <lionel_debroux@...oo.fr>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>
Subject: Re: [RFC PATCHv3 4/6] clocksource: Add TI-Nspire timer drivers


On 14/05/2013, at 6:03 PM, Linus Walleij <linus.walleij@...aro.org> wrote:

>> +
>> +       timer->interrupt_regs = of_iomap(node, 1);
> 
> Check for errors.
> 
>> +       timer->irqnr = irq_of_parse_and_map(node, 0);
> 
> Check for errors.
>> +       if (timer->interrupt_regs && timer->irqnr) {
>> 

The idea with this is to make these properties optional. Each timer has two sub-timers but only one can generate interrupts. One will be added as a clockevent device and the other as a clocksource. If an IRQ number or interrupt acknowledge address is not passed through the DT, then the clockevents device is not added but the clocksource still is.

Should I comment it in the code to make it apparent what's happening or is there a better way to express this?

> 
>> +               writel(0x3F, timer->interrupt_regs + IO_INTR_ACK);
> 
> Hm magic number, I guess it's clearing all IRQ lines…

It's a bitmask of bits 0-5. 

> 
>> +
>> +               /* Interrupt to occur when timer value matches 0 */
>> +               writel(0, timer->base + IO_MATCH1);
>> +
>> +               timer->clkevt_irq.name  = timer->clockevent_name;
>> +               timer->clkevt_irq.handler = nspire_timer_interrupt;
>> +               timer->clkevt_irq.dev_id = timer;
>> +               timer->clkevt_irq.flags =
>> +                       IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL;
>> +
>> +               setup_irq(timer->irqnr, &timer->clkevt_irq);
>> +
>> +               clockevents_config_and_register(&timer->clkevt,
>> +                               clk_get_rate(timer->clk), 0x0001, 0xfffe);
>> +               pr_info("Added %s as clockevent\n", timer->clockevent_name);
>> +       }
>> +
>> +       writel(CNTL_RUN_TIMER | CNTL_FOREVER | CNTL_INC,
>> +                       timer->timer2 + IO_CONTROL);
>> +
>> +       clocksource_mmio_init(timer->timer2 + IO_CURRENT_VAL,
>> +                       timer->clocksource_name,
>> +                       clk_get_rate(timer->clk),
>> +                       200, 16,
>> +                       clocksource_mmio_readw_up);
> 
> If this timer is really just 16 bits, it's a *pretty* good idea to use
> the prescaler (I guess this is what IO_DIVIDER is) beacuse else you
> will get short sleep times with CONFIG_NO_HZ_IDLE on this system,
> and wake up unnecessarily often.
> 
> The same goes for the clock event.

The clock frequency is 32768Hz. Should I be scaling it down at that frequency?

> 
> See how we calculate the prescaler in arch/arm/mach-integrator/integrator_ap.c
> for example.
> 
> Yours,
> Linus Walleij

Cheers,
Daniel Tang--
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