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Message-ID: <CACRpkdaf6U6Z2ZKGJQa4UDH1s=upHSaJUDS3O2zgAiazN=qB5A@mail.gmail.com>
Date:	Wed, 15 May 2013 21:09:17 +0200
From:	Linus Walleij <linus.walleij@...aro.org>
To:	James Hogan <james.hogan@...tec.com>
Cc:	"arm@...nel.org" <arm@...nel.org>,
	"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
	Grant Likely <grant.likely@...retlab.ca>,
	Rob Herring <rob.herring@...xeda.com>,
	"devicetree-discuss@...ts.ozlabs.org" 
	<devicetree-discuss@...ts.ozlabs.org>,
	Rob Landley <rob@...dley.net>,
	"linux-doc@...r.kernel.org" <linux-doc@...r.kernel.org>
Subject: Re: [PATCH 6/8] gpio-tz1090: add TZ1090 gpio driver

On Fri, May 3, 2013 at 11:09 AM, James Hogan <james.hogan@...tec.com> wrote:
> Hi Linus,
> On 03/05/13 09:49, Linus Walleij wrote:
>> On Fri, Apr 26, 2013 at 11:22 AM, James Hogan <james.hogan@...tec.com> wrote:
>>> So basically a bunch of global registers (e.g. pinctrl and gpio) are
>>> shared between all 3 cores (up to 4 OSes). The __global_lock2 should do
>>> all that is required to ensure exclusive access to the register (as long
>>> as the other OSes do something similar when they access the same
>>> registers). This is one of the reasons why there are 3 gpio banks with
>>> separate interrupts, and each bank's interrupt is optional in this driver.
>>
>> OK I get it ...
>>
>> I think this platform will never ever work with single zImage
>> though, that seems very unlikely given these constraints.
>>
>> Well you will have to fight this out with the ARM SoC maintainers
>> anyway. If they are OK with it I will live with it.
>>
>> (CC ARM SoC for this.)
>
> Sorry, I wasn't very clear. This driver runs on a Meta core (i.e.
> arch/metag) not an ARM core, and <asm/global_lock.h> is an architecture
> thing (LOCK{0,1,2} are instructions).

Aha sorry it's my fault, I'm some ARM-head so I just think the whole
world is. Neat arch!

Yours,
Linus Walleij
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