linux-kernel - Re: Drop WARN on AMD lack of perfctrs

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Message-ID: <20130521085630.GA1860@rric.localhost>
Date:	Tue, 21 May 2013 10:56:30 +0200
From:	Robert Richter <rric@...nel.org>
To:	Peter Zijlstra <peterz@...radead.org>
Cc:	Borislav Petkov <bp@...en8.de>, Josh Boyer <jwboyer@...hat.com>,
	Ingo Molnar <mingo@...hat.com>,
	Arnaldo Carvalho de Melo <acme@...stprotocols.net>,
	x86@...nel.org, linux-kernel@...r.kernel.org, gleb@...hat.com,
	Jacob Shin <jacob.shin@....com>
Subject: Re: Drop WARN on AMD lack of perfctrs

On 17.05.13 12:57:30, Peter Zijlstra wrote:
> 
> So what about something like the below?

See my comments below, otherwise it looks fine to me.

There is the question about core performance counters and its
constraints on fam16h. Not sure if there are any. Cc'ing Jacob.

-Robert

> 
> ---
>  arch/x86/kernel/cpu/perf_event_amd.c | 26 ++++++++++----------------
>  1 file changed, 10 insertions(+), 16 deletions(-)
> 
> diff --git a/arch/x86/kernel/cpu/perf_event_amd.c b/arch/x86/kernel/cpu/perf_event_amd.c
> index 7e28d94..87e8a7e 100644
> --- a/arch/x86/kernel/cpu/perf_event_amd.c
> +++ b/arch/x86/kernel/cpu/perf_event_amd.c
> @@ -648,24 +648,19 @@ static __initconst const struct x86_pmu amd_pmu = {
>  	.cpu_dead		= amd_pmu_cpu_dead,
>  };
>  
> -static int setup_event_constraints(void)
> +__init int amd_core_pmu_init(void)
>  {
> -	if (boot_cpu_data.x86 == 0x15)
> +	switch (boot_cpu_data.x86) {
> +	case 0x15:
> +		pr_cont("Fam15h ");
>  		x86_pmu.get_event_constraints = amd_get_event_constraints_f15h;
> -	return 0;
> -}
> +		break;
>  
> -static int setup_perfctr_core(void)
> -{
> -	if (!cpu_has_perfctr_core) {
> -		WARN(x86_pmu.get_event_constraints == amd_get_event_constraints_f15h,
> -		     KERN_ERR "Odd, counter constraints enabled but no core perfctrs detected!");
> +	default:
> +		pr_err("core perfctr but no constraints; unknown hardware!\n");
>  		return -ENODEV;
>  	}
>  
> -	WARN(x86_pmu.get_event_constraints == amd_get_event_constraints,
> -	     KERN_ERR "hw perf events core counters need constraints handler!");
> -
>  	/*
>  	 * If core performance counter extensions exists, we must use
>  	 * MSR_F15H_PERF_CTL/MSR_F15H_PERF_CTR msrs. See also

... amd_pmu_addr_offset():

         * If core performance counter extensions exists, we must use
         * MSR_F15H_PERF_CTL/MSR_F15H_PERF_CTR msrs. See also
         * amd_pmu_addr_offset().

> @@ -675,8 +670,7 @@ static int setup_perfctr_core(void)
>  	x86_pmu.perfctr		= MSR_F15H_PERF_CTR;
>  	x86_pmu.num_counters	= AMD64_NUM_COUNTERS_CORE;
>  
> -	printk(KERN_INFO "perf: AMD core performance counters detected\n");
> -
> +	pr_cont("core perfctr, ");
>  	return 0;
>  }
>  
> @@ -688,8 +682,8 @@ __init int amd_pmu_init(void)
>  
>  	x86_pmu = amd_pmu;
>  
> -	setup_event_constraints();
> -	setup_perfctr_core();
> +	if (cpu_has_perfctr_core && amd_core_pmu_init())
> +		return -ENODEV;

Better return result of amd_core_pmu_init().

>  
>  	/* Events are common for all AMDs */
>  	memcpy(hw_cache_event_ids, amd_hw_cache_event_ids,
> 
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