linux-kernel - Re: [PATCH 1/1] i2c: omap: correct usage of the interrupt enable register

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Message-ID: <878v2x7lak.fsf@linaro.org>
Date:	Wed, 29 May 2013 10:22:59 -0700
From:	Kevin Hilman <khilman@...aro.org>
To:	Oleksandr Dmytryshyn <oleksandr.dmytryshyn@...com>
Cc:	Tony Lindgren <tony@...mide.com>, Wolfram Sang <wsa@...-dreams.de>,
	<linux-omap@...r.kernel.org>, <linux-i2c@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] i2c: omap: correct usage of the interrupt enable register

Oleksandr Dmytryshyn <oleksandr.dmytryshyn@...com> writes:

> Starting from the OMAP chips with version2 registers scheme there are
> 2 registers (I2C_IRQENABLE_SET and I2C_IRQENABLE_CLR) to manage
> interrupts instead of the older OMAP chips with old scheme which have
> only one register (I2C_IE).  Now we should use I2C_IRQENABLE_SET
> register for enabling interrupts and I2C_IRQENABLE_CLR register for
> disabling interrupts.

Why?  (changelogs should always answer the "why" question)

IOW, what is broken without this change, how does it fail?  And equally
important, how is it currently working?

Kevin


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