linux-kernel - Re: [PATCH 1/1] i2c: omap: correct usage of the interrupt enable register

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [day] [month] [year] [list]

Date:	Thu, 30 May 2013 18:42:50 +0300
From:	Oleksandr Dmytryshyn <oleksandr.dmytryshyn@...com>
To:	Kevin Hilman <khilman@...aro.org>
CC:	Tony Lindgren <tony@...mide.com>, Wolfram Sang <wsa@...-dreams.de>,
	<linux-omap@...r.kernel.org>, <linux-i2c@...r.kernel.org>,
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH 1/1] i2c: omap: correct usage of the interrupt enable
 register

On 05/30/2013 05:18 PM, Kevin Hilman wrote:
> Oleksandr Dmytryshyn <oleksandr.dmytryshyn@...com> writes:
>
>> On 05/29/2013 08:22 PM, Kevin Hilman wrote:
>>> Oleksandr Dmytryshyn <oleksandr.dmytryshyn@...com> writes:
>>>
>>>> Starting from the OMAP chips with version2 registers scheme there are
>>>> 2 registers (I2C_IRQENABLE_SET and I2C_IRQENABLE_CLR) to manage
>>>> interrupts instead of the older OMAP chips with old scheme which have
>>>> only one register (I2C_IE).  Now we should use I2C_IRQENABLE_SET
>>>> register for enabling interrupts and I2C_IRQENABLE_CLR register for
>>>> disabling interrupts.
>>> Why?  (changelogs should always answer the "why" question)
>>>
>>> IOW, what is broken without this change, how does it fail?  And equally
>>> important, how is it currently working?
>>>
>>> Kevin
>>>
>>>
>> Hi, Kevin.
>>
>> If the i2c controller during suspend will generate an interrupt, it
>> can lead to unpredictable behaviour in the kernel.
>>
>> Based on the logic of the kernel code interrupts from i2c should be
>> prohibited during suspend. Kernel writes 0 to the I2C_IE register in
>> the omap_i2c_runtime_suspend() function. In the other side kernel
>> writes saved interrupt flags to the I2C_IE register in
>> omap_i2c_runtime_resume() function. I.e. interrupts should be disabled
>> during suspend.
>>
>> This works for chips with version1 registers scheme. Interrupts are
>> disabled during suspend. For chips with version2 scheme registers
>> writting 0 to the I2C_IE register does nothing (because now the
>> I2C_IRQENABLE_SET register is located at this address ). This register
>> is used to enable interrupts. For disabling interrupts
>> I2C_IRQENABLE_CLR register should be used.
>>
>> I've checked that interrupts in the i2c controller are still enabled
>> after writting 0 to the I2C_IE register. But with my patch interrupts
>> are disabled in the omap_i2c_runtime_suspend() function.
> Yes, I understand why your patch works, and it looks correct to me.
>
> My main concern is that the changelog is missing a detailed description
> of the problem that is being solved, as well as a summary of why this
> has ever worked.  I guess we've just been lucky and not seen interrupts
> during suspend?
>
> Kevin
Hi, Kevin.

Yes. You are right about the interrupts.

-- 

Best regards,
Oleksandr Dmytryshyn | OMAP4 Platform
GlobalLogic Inc. | Innovation by Design
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/