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Message-ID: <20130531084508.GA4928@mudshark.cambridge.arm.com>
Date: Fri, 31 May 2013 09:45:08 +0100
From: Will Deacon <will.deacon@....com>
To: Nicolas Pitre <nico@...xnic.net>
Cc: "Wang, Yalin" <Yalin.Wang@...ymobile.com>,
"'richard -rw- weinberger'" <richard.weinberger@...il.com>,
"'linux-arch@...r.kernel.org'" <linux-arch@...r.kernel.org>,
"'linux-kernel@...r.kernel.org'" <linux-kernel@...r.kernel.org>,
"'linux-arm-kernel@...ts.infradead.org'"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: A bug about system call on ARM
On Fri, May 31, 2013 at 04:54:56AM +0100, Nicolas Pitre wrote:
> On Thu, 30 May 2013, Will Deacon wrote:
>
> > On Thu, May 30, 2013 at 10:09:49AM +0100, Will Deacon wrote:
> > > On Thu, May 30, 2013 at 02:41:42AM +0100, Wang, Yalin wrote:
> > > > If you have some patch for this issue,
> > > > I can do the test for it .
> > >
> > > I'll have a look at cooking something which uses an exception table entry
> > > to rewind the PC and retry the system call. That's simpler than directly
> > > injecting a user page fault from the system call path.
> >
> > Ok, please can you try the following?
> >
> > Will
> >
> > --->8
> >
> > diff --git a/arch/arm/kernel/entry-common.S b/arch/arm/kernel/entry-common.S
> > index bc5bc0a..855926e 100644
> > --- a/arch/arm/kernel/entry-common.S
> > +++ b/arch/arm/kernel/entry-common.S
> > @@ -361,6 +361,15 @@ ENTRY(vector_swi)
> > str r8, [sp, #S_PSR] @ Save CPSR
> > str r0, [sp, #S_OLD_R0] @ Save OLD_R0
> > zero_fp
> > + enable_irq
> > + ct_user_exit
> > +
> > +#ifdef CONFIG_ALIGNMENT_TRAP
> > + ldr ip, __cr_alignment
> > + ldr ip, [ip]
> > + mcr p15, 0, ip, c1, c0 @ update control register
> > +#endif
>
> This is wrong. you must set up the align bit in the control register
> _before_ enabling IRQs or an IRQ handler might run without alignment
> fixup.
Okey doke, I can fix that up. I thought it was only needed for the network
layer, but I suppose they have interrupts over there too :)
> Otherwise the patch looks good to me.
Thanks Nicolas.
Will
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