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Date:	Fri, 31 May 2013 18:23:12 +0200
From:	Andi Kleen <andi@...stfloor.org>
To:	Stephane Eranian <eranian@...gle.com>
Cc:	Andi Kleen <andi@...stfloor.org>, Ingo Molnar <mingo@...nel.org>,
	LKML <linux-kernel@...r.kernel.org>,
	Peter Zijlstra <a.p.zijlstra@...llo.nl>,
	Andrew Morton <akpm@...ux-foundation.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	Andi Kleen <ak@...ux.intel.com>
Subject: Re: [PATCH 1/5] perf, x86: Add Haswell PEBS record support v5

On Fri, May 31, 2013 at 03:02:29PM +0200, Stephane Eranian wrote:
> Hi,
> 
> So looked at this patch again. There is nothing wrong with the code.
> But there is something bothering me with the usage model. I think
> the choice of having pebs->ip for precise=1 or pebs->real_ip for
> precise=2 is too restrictive.
> 
> There are situations where you want BOTH the real_ip AND the
> off-by-one ip. This is when you're sampling call branches.
> The real_ip gives you the call site, the off-by-one gives you
> the target of the branch. This is very handy because you do
> not need to use the LBR to get this, unlike with SandyBridge.

It's also useful for TSX: critical section versus abort point
inside transaction.

> So we need to find an extension or a way to return both IPs
> without invoking LBR. Easiest would be to add another
> PERF_SAMPLE_*.
> 
> Any better idea?

For TSX I just use two different events. It works.

I'm not disagreeing with it, but I think it's an orthogonal issue to my
patchkit.   Adding a new SAMPLE type seems reasonable to me.

-Andi
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