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Message-ID: <alpine.LFD.2.02.1306031637420.2905@ionos>
Date: Mon, 3 Jun 2013 16:45:56 +0200 (CEST)
From: Thomas Gleixner <tglx@...utronix.de>
To: Ivo Sieben <meltedpianoman@...il.com>
cc: RT <linux-rt-users@...r.kernel.org>,
LKML <linux-kernel@...r.kernel.org>,
Sebastian Andrzej Siewior <bigeasy@...utronix.de>,
Steven Rostedt <rostedt@...dmis.org>
Subject: Re: [PATCH-v2] Set irq thread to RT priority on creation
On Mon, 3 Jun 2013, Ivo Sieben wrote:
> When a threaded irq handler is installed the irq thread is initially created
> on normal scheduling priority. Only after the the irq thread is woken up it
> immediately sets its priority to RT_FIFO MAX_USER_RT_PRIO/2.
>
> This means that interrupts that occur directly after the irq handler is
> installed will be handled on a normal scheduling priority instead of the
> realtime priority that you would expect. Fixed this by setting the RT
> priority on creation of the irq_thread.
>
> This solves the following issue with a UART device driver:
> On start of the application there is already data present in the uart RX
> fifo buffer. On opening the uart device the hard & threaded interrupt
> handlers are installed and the interrupts are enabled. Immediately a hard
> irq occurs because there is still data in the RX fifo. Because the threaded
> irq handler is still on normal scheduling, my application is not immediatly
> interrupted by the threaded handler and continues to run: it tries to flush
> the uart input buffer and writes data to the uart device. After this the
> threaded handler finally gets scheduled in and fills the buffer with the
> "old" received data. When my application reads data from the uart port it
> receives the "old" data and gives an error.
While I in principle agree with the patch, the issue you are
describing is just solved accidentaly.
The question is why there is data present in the UART when the UART
driver has not initialized the UART. Up to the point where the UART is
opened and the interrupt handler is installed the receiver should be
disabled. Also there is the question why a flush does not kill
everything including the pending data in the UART itself.
And I don't think, that your issue is solved completely. Assume the
following:
Open UART
Flush Buffers (including UART fifo)
---> UART receives data
---> Interrupt
Data is available in tty buffer
Write data to UART
Receive data from UART
You still get data which got into the buffer before you sent stuff
out. So your application should not be surpriced at all by random data
on the receive line when it starts up.
Thanks,
tglx
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