linux-kernel - Re: [PATCH] net/macb: fix ISR clear-on-write behavior only for some SoC

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Date:	Tue, 4 Jun 2013 09:51:48 +0200
From:	Nicolas Ferre <nicolas.ferre@...el.com>
To:	Steffen Trumtrar <s.trumtrar@...gutronix.de>
CC:	Michal Simek <monstr@...str.eu>,
	Jean-Christophe PLAGNIOL-VILLARD <plagnioj@...osoft.com>,
	Hein Tibosch <hein_tibosch@...oo.es>, <netdev@...r.kernel.org>,
	<michal.simek@...inx.com>, <linux-kernel@...r.kernel.org>,
	Ludovic Desroches <ludovic.desroches@...el.com>,
	<linux-arm-kernel@...ts.infradead.org>,
	Sören Brinkmann <soren.brinkmann@...inx.com>
Subject: Re: [PATCH] net/macb: fix ISR clear-on-write behavior only for some
 SoC

On 04/06/2013 08:49, Steffen Trumtrar :
> On Tue, Jun 04, 2013 at 08:15:45AM +0200, Michal Simek wrote:
>> On 05/14/2013 07:52 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>> On 08:58 Tue 14 May     , Hein Tibosch wrote:
>>>> On 5/14/2013 12:05 AM, Jean-Christophe PLAGNIOL-VILLARD wrote:
>>>>> On May 14, 2013, at 12:05 AM, Nicolas Ferre <nicolas.ferre@...el.com> wrote:
>>>>>
>>>>>> Commit 749a2b6 (net/macb: clear tx/rx completion flags in ISR)
>>>>>> introduces clear-on-write on ISR register. This behavior is not always
>>>>>> implemented when using Cadence MACB/GEM and is breaking other platforms.
>>>>>> We are using a new Device Tree compatibility string and a capability
>>>>>> property to actually activate this clear-on-write behavior on ISR.
>>>>>>
>>>>>> Reported-by: Hein Tibosch <hein_tibosch@...oo.es>
>>>>>> Signed-off-by: Nicolas Ferre <nicolas.ferre@...el.com>
>>>>> can we detect it via the IP?
>>>>
>>>> This was my first proposal, have it based on the value of MACB's
>>>> register 'MID' (offset 0x00fc, lower 16 bits).
>>>> On avr32 it reads: 0x0000010D, on Zynq it reports 0x00000119
>>>>
>>>> So for the moment, CAPS_ISR_CLEAR_ON_WRITE could be set if the revision
>>>> equals to 0x00000119?
>>> so no it will not work
>>>
>>> as the gem on sama5 is 00020119
>>>
>>> so version 0x119 too
>>>
>>> nico
>>> Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@...osoft.com>
>>
>> Was this added to any queue or branch?
>> I would like to enable macb for zynq and not sure if "cdns,zynq-7000-gem"
>> compatible string goes to mainline.
>>
>
> Hi!
>
> This is already in next, but you can use the default compatible as the

Even more: already in Linus' tree!

> DCR1 is used instead of DT binding.

Absolutely.

Best regards,
-- 
Nicolas Ferre
--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/