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Message-ID: <51ADE312.3040801@monstr.eu>
Date: Tue, 04 Jun 2013 14:52:34 +0200
From: Michal Simek <monstr@...str.eu>
To: Steffen Trumtrar <s.trumtrar@...gutronix.de>
CC: Michal Simek <michal.simek@...inx.com>,
linux-kernel@...r.kernel.org,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
linux-serial@...r.kernel.org, Jiri Slaby <jslaby@...e.cz>
Subject: Re: [PATCH] tty: serial: Enable uartlite for ARM zynq
On 06/04/2013 02:43 PM, Steffen Trumtrar wrote:
> On Tue, Jun 04, 2013 at 02:20:43PM +0200, Michal Simek wrote:
>> Enable it in Kconfig.
>>
>> Signed-off-by: Michal Simek <michal.simek@...inx.com>
>> ---
>> drivers/tty/serial/Kconfig | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/drivers/tty/serial/Kconfig b/drivers/tty/serial/Kconfig
>> index 7e7006f..64250b1 100644
>> --- a/drivers/tty/serial/Kconfig
>> +++ b/drivers/tty/serial/Kconfig
>> @@ -576,7 +576,7 @@ config SERIAL_IMX_CONSOLE
>>
>> config SERIAL_UARTLITE
>> tristate "Xilinx uartlite serial port support"
>> - depends on PPC32 || MICROBLAZE || MFD_TIMBERDALE
>> + depends on PPC32 || MICROBLAZE || MFD_TIMBERDALE || ARCH_ZYNQ
>> select SERIAL_CORE
>> help
>> Say Y here if you want to use the Xilinx uartlite serial controller.
>> --
>> 1.8.2.3
>>
>
> Hi!
>
> Doesn't the Zynq use xilinx_uartps ? (which in turn is actually a Cadence UART)
You can add this soft IP to programmable logic.
It means 2 uartps are hard blocks in the zynq and then you can add unlimited number
of these uartlite drivers or ns16550 to PL.
Thanks,
Michal
--
Michal Simek, Ing. (M.Eng), OpenPGP -> KeyID: FE3D1F91
w: www.monstr.eu p: +42-0-721842854
Maintainer of Linux kernel - Microblaze cpu - http://www.monstr.eu/fdt/
Maintainer of Linux kernel - Xilinx Zynq ARM architecture
Microblaze U-BOOT custodian and responsible for u-boot arm zynq platform
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