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Message-Id: <20130605051501.8A226E0090@blue.fi.intel.com>
Date:	Wed,  5 Jun 2013 08:15:01 +0300 (EEST)
From:	"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
To:	Alex Shi <alex.shi@...el.com>
Cc:	"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
	"H. Peter Anvin" <hpa@...or.com>,
	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>, x86@...nel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH] x86/tlb_info: detect more tlb configuration

Alex Shi wrote:
> On 06/04/2013 11:09 PM, Kirill A. Shutemov wrote:
> > 
> > Kirill A. Shutemov wrote:
> >> From: "Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>
> >>
> > 
> > Err.. Forgot CC lists.
> > 
> >> Software Developer’s Manual covers two more TLB configurations:
> >>
> >> 63H Data TLB: 1 GByte pages, 4-way set associative, 4 entries
> >> 76H Instruction TLB: 2M/4M pages, fully associative, 8 entries
> 
> Acked-by: Alex Shi <alex.shi@...el.com>
> 
> BTW,
> What the new CPU has them?

All starting from SandyBridge, I believe.

-- 
 Kirill A. Shutemov
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