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Message-ID: <CAN1soZw9F-LeUVcYmJ7wKOnacKsBgkGookMrDM11KNsQ0sxw9w@mail.gmail.com>
Date: Wed, 5 Jun 2013 13:24:57 +0800
From: Haojian Zhuang <haojian.zhuang@...il.com>
To: "Manjunathappa, Prakash" <prakash.pm@...com>
Cc: Walleij Linus <linus.walleij@...aro.org>,
davinci-linux-open-source@...ux.davincidsp.com,
Linux Russell <linux@....linux.org.uk>,
linux-doc@...r.kernel.org, devicetree-discuss@...ts.ozlabs.org,
Sekhar Nori <nsekhar@...com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Rob Herring <rob.herring@...xeda.com>, peter.ujfalusi@...com,
grant.likely@...aro.org,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: [PATCH 1/3] pinctrl: pinctrl-single: enhance to configure
multiple pins of different modules
On Tue, May 21, 2013 at 10:08 PM, Manjunathappa, Prakash
<prakash.pm@...com> wrote:
> Add support to configure multiple pins in each register, existing
> implementation added by [1] does not support full fledge multiple pin
> configuration in single register, reports a pin clash when different
> modules configure different bits of same register. The issue reported
> and discussed here
> http://www.spinics.net/lists/arm-kernel/msg235213.html
>
> With pinctrl-single,bits-per-mux property specified, use function-mask
> property to find out number pins to configure. Allocate and register
> pin control functions based sub mask.
>
> Tested on da850/omap-l138 EVM.
> does not support variable submask for pins.
> does not support pinconf.
>
> [1] "pinctrl: pinctrl-single: Add pinctrl-single,bits type of mux"
> (9e605cb68a21d5704839a192a46ebcf387773704),
>
> Signed-off-by: Manjunathappa, Prakash <prakash.pm@...com>
> Reported-by: Lad, Prabhakar <prabhakar.csengg@...il.com>
> Tested-by: Lad, Prabhakar <prabhakar.csengg@...il.com>
Excuse me for response late.
Acked-by: Haojian Zhuang <haojian.zhuang@...il.com>
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