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Message-ID: <CACxGe6tCfvbwxAmTn3EKXifg+GYnTDAQCXuEaEAoHD_QCzmQqw@mail.gmail.com>
Date:	Mon, 10 Jun 2013 11:33:19 +0100
From:	Grant Likely <grant.likely@...aro.org>
To:	Russell King - ARM Linux <linux@....linux.org.uk>
Cc:	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Arnd Bergmann <arnd@...db.de>,
	Benjamin Herrenschmidt <benh@...nel.crashing.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	"linuxppc-dev@...ts.ozlabs.org" <linuxppc-dev@...ts.ozlabs.org>,
	Linus Walleij <linus.walleij@...aro.org>
Subject: Re: [RFC 10/10] irqchip: Make versatile fpga irq driver a generic chip

On Mon, Jun 10, 2013 at 10:03 AM, Russell King - ARM Linux
<linux@....linux.org.uk> wrote:
> On Mon, Jun 10, 2013 at 01:49:22AM +0100, Grant Likely wrote:
>> This is an RFC patch to convert the versatile FPGA irq controller driver
>> to use generic irq chip. It builds on the series that extends the
>> generic chip code to allow a linear irq domain to contain one or more
>> generic irq chips so that each interrupt controller doesn't need to hand
>> code the generic chip setup.
>
> NAK, this makes functional changes.  You assume that the validity mask is
> a set of zeros followed by a set of ones.  This is not always the case.
> The PIC on Integrator/CP only has bits 29-22 and 11-0 set because 21-12
> are not valid.

Actually, I don't (at least I don't intend to). It chooses the size of
the irq_domain based on fls(), but that is only because the size has
to allocates for both the holes and the active irqs. You'll notice
that gc->unused is set to ~valid, and the generic chip code will
refuse to map in interrupt that isn't supported. If you see something
different, please point out where because that would be a bug.

g.
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