Date:	Wed, 12 Jun 2013 15:18:39 +0530
From:	Amit Kucheria <amit.kucheria@...aro.org>
To:	Arjan van de Ven <arjan@...ux.intel.com>
Cc:	David Lang <david@...g.hm>,
	"len.brown@...el.com" <len.brown@...el.com>,
	"alex.shi@...el.com" <alex.shi@...el.com>,
	"corbet@....net" <corbet@....net>,
	Peter Zijlstra <peterz@...radead.org>,
	Catalin Marinas <catalin.marinas@....com>,
	Linux PM list <linux-pm@...r.kernel.org>,
	"Rafael J. Wysocki" <rjw@...ysocki.net>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Morten Rasmussen <Morten.Rasmussen@....com>,
	Linus Torvalds <torvalds@...ux-foundation.org>,
	linaro-kernel <linaro-kernel@...ts.linaro.org>,
	Mike Galbraith <efault@....de>,
	Preeti U Murthy <preeti@...ux.vnet.ibm.com>,
	Andrew Morton <akpm@...ux-foundation.org>,
	"pjt@...gle.com" <pjt@...gle.com>, Ingo Molnar <mingo@...nel.org>
Subject: Re: power-efficient scheduling design

On Wed, Jun 12, 2013 at 7:18 AM, Arjan van de Ven <arjan@...ux.intel.com> wrote:
> On 6/11/2013 5:27 PM, David Lang wrote:
>>
>>
>> Nobody is saying that this sort of thing should be in the fastpath of the
>> scheduler.
>>
>> But if the scheduler has a table that tells it the possible states, and
>> the cost to get from the current state to each of these states (and to get
>> back and/or wake up to
>> full power), then the scheduler can make the decision on what to do,
>> invoke a routine to make the change (and in the meantime, not be fighting
>> the change by trying to
>> schedule processes on a core that's about to be powered off), and then
>> when the change happens, the scheduler will have a new version of the table
>> of possible states and costs
>>
>> This isn't in the fastpath, it's in the rebalancing logic.
>
>
> the reality is much more complex unfortunately.
> C and P states hang together tightly, and even C state on
> one core impacts other cores' performance, just like P state selection
> on one core impacts other cores.
>
> (at least for x86, we should really stop talking as if the OS picks the
> "frequency",
> that's just not the case anymore)

This is true of ARM platforms too. As Daniel pointed out in an earlier
email, the operating point (frequency, voltage) has a bearing on the
c-state latency too.

An additional complexity is thermal constraints. E.g. On a quad-core
Cortex-A15 processor capable of say 1.5GHz, you won't be able to run
all 4 cores at that speed for very long w/o exceeding the thermal
envelope. These overdrive frequencies (turbo in x86-speak) impact the
rest of the system by either constraining the frequency of other cores
or requiring aggresive thermal management.

Do we really want to track these details in the scheduler or just let
the scheduler provide notifications to the existing subsystems
(cpufreq, cpuidle, thermal, etc.) with some sort of feedback going
back to the scheduler to influence future decisions?

Feeback to the scheduler could be something like the following (pardon
the names):

1. ISOLATE_CORE: Don't schedule anything on this core - cpuidle might
use this to synchronise cores for a cluster shutdown, thermal
framework could use this as idle injection to reduce temperature
2. CAP_CAPACITY: Don't expect cpufreq to raise the frequency on this
core - cpufreq might use this to cap overall energy since overdrive
operating points are very expensive, thermal might use this to slow
down rate of increase of die temperature

Regards,
Amit
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