lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [day] [month] [year] [list]
Message-ID: <20130612212308.GA27681@manwe>
Date:	Wed, 12 Jun 2013 23:23:10 +0200
From:	Thierry Reding <thierry.reding@...il.com>
To:	Stephen Warren <swarren@...dotorg.org>
Cc:	Grant Likely <grant.likely@...retlab.ca>,
	Rob Herring <rob.herring@...xeda.com>,
	Bjorn Helgaas <bhelgaas@...gle.com>,
	Russell King <linux@....linux.org.uk>,
	Andrew Murray <andrew.murray@....com>,
	Jason Gunthorpe <jgunthorpe@...idianresearch.com>,
	Arnd Bergmann <arnd@...db.de>,
	Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
	devicetree-discuss@...ts.ozlabs.org, linux-kernel@...r.kernel.org,
	linux-arm-kernel@...ts.infradead.org, linux-tegra@...r.kernel.org,
	linux-pci@...r.kernel.org
Subject: Re: [PATCH v3 07/12] PCI: tegra: Move PCIe driver to drivers/pci/host

On Wed, Jun 12, 2013 at 10:09:10AM -0600, Stephen Warren wrote:
> On 06/12/2013 06:30 AM, Thierry Reding wrote:
> > On Mon, Apr 15, 2013 at 12:28:12PM -0600, Stephen Warren wrote:
> >> On 04/03/2013 08:45 AM, Thierry Reding wrote:
> >>> Move the PCIe driver from arch/arm/mach-tegra into the
> >>> drivers/pci/host directory. The motivation is to collect
> >>> various host controller drivers in the same location in order
> >>> to facilitate refactoring.
> >>> 
> >>> The Tegra PCIe driver has been largely rewritten, both in order
> >>> to turn it into a proper platform driver and to add MSI (based
> >>> on code by Krishna Kishore <kthota@...dia.com>) as well as
> >>> device tree support.
> ...
> >>> +static irqreturn_t tegra_pcie_msi_irq(int irq, void *data)
> >> ...
> >>> +	return IRQ_HANDLED;
> >> 
> >> Shouldn't this function return IRQ_NONE if no MSI status bits
> >> were found set?
> > 
> > The IRQ isn't marked IRQF_SHARED, so I don't think this is needed.
> 
> Isn't it still useful to detect unexpected/stuck interrupts?

Yes, you're right. I can't think of a nicer way to do it, though, so
I'll go with a processed IRQ counter or a flag.

> >>> +static int tegra_pcie_probe(struct platform_device *pdev)
> >> ...
> >>> +	pcibios_min_mem = 0;
> >> 
> >> What does that mean/do? I wonder if that should be set to
> >> 0x80000000 by the Tegra30 patches?
> > 
> > ARM defines PCIBIOS_MIN_MEM to that variable. That macro in turn is
> > only used by pci_bus_alloc_resource() AFAICT, which uses it to
> > override the start of a resource when allocating if res->start ==
> > 0. As such it designates a lower-bound of valid PCI memory
> > addresses, so 0 on Tegra20 and 0x80000000 on Tegra30 don't seem
> > like good values. Maybe we need to set them to the lowest of the
> > prefetchable and non-prefetchable memory areas as defined in the
> > DT?
> > 
> > It doesn't currently seem to matter at all, though, since we never
> > pass in a range that's 0, so the start address of resources can
> > never be 0 and therefore PCIBIOS_MIN_MEM is never used.
> 
> Hmmm. I guess ignore it then. If the value won't ever be used, 0 is as
> good a value as any?

Alright, I'll do that then.

Thierry

Content of type "application/pgp-signature" skipped

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ