linux-kernel - [ 32/48] drm/nv50/disp: force dac power state during load detect

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Message-Id: <20130618161730.543655939@linuxfoundation.org>
Date:	Tue, 18 Jun 2013 09:17:58 -0700
From:	Greg Kroah-Hartman <greg@...ah.com>
To:	linux-kernel@...r.kernel.org
Cc:	Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
	stable@...r.kernel.org,
	Gerhard Bräunlich <wippbox@....net>,
	Ben Skeggs <bskeggs@...hat.com>
Subject: [ 32/48] drm/nv50/disp: force dac power state during load detect

From: Greg Kroah-Hartman <gregkh@...uxfoundation.org>

3.9-stable review patch.  If anyone has any objections, please let me know.

------------------

From: Ben Skeggs <bskeggs@...hat.com>

commit ea9197cc323839ef3d5280c0453b2c622caa6bc7 upstream.

fdo#64904

Reported-by: Gerhard Bräunlich <wippbox@....net>
Signed-off-by: Ben Skeggs <bskeggs@...hat.com>

---
 drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c |    4 ++++
 drivers/gpu/drm/nouveau/core/include/core/class.h  |    2 +-
 2 files changed, 5 insertions(+), 1 deletion(-)

--- a/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/disp/dacnv50.c
@@ -50,11 +50,15 @@ nv50_dac_sense(struct nv50_disp_priv *pr
 {
 	const u32 doff = (or * 0x800);
 	int load = -EINVAL;
+	nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80150000);
+	nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);
 	nv_wr32(priv, 0x61a00c + doff, 0x00100000 | loadval);
 	udelay(9500);
 	nv_wr32(priv, 0x61a00c + doff, 0x80000000);
 	load = (nv_rd32(priv, 0x61a00c + doff) & 0x38000000) >> 27;
 	nv_wr32(priv, 0x61a00c + doff, 0x00000000);
+	nv_mask(priv, 0x61a004 + doff, 0x807f0000, 0x80550000);
+	nv_wait(priv, 0x61a004 + doff, 0x80000000, 0x00000000);
 	return load;
 }
 
--- a/drivers/gpu/drm/nouveau/core/include/core/class.h
+++ b/drivers/gpu/drm/nouveau/core/include/core/class.h
@@ -216,7 +216,7 @@ struct nv04_display_class {
 #define NV50_DISP_DAC_PWR_STATE                                      0x00000040
 #define NV50_DISP_DAC_PWR_STATE_ON                                   0x00000000
 #define NV50_DISP_DAC_PWR_STATE_OFF                                  0x00000040
-#define NV50_DISP_DAC_LOAD                                           0x0002000c
+#define NV50_DISP_DAC_LOAD                                           0x00020100
 #define NV50_DISP_DAC_LOAD_VALUE                                     0x00000007
 
 #define NV50_DISP_PIOR_MTHD                                          0x00030000


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