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Message-ID: <51C1E028.2040700@caviumnetworks.com>
Date: Wed, 19 Jun 2013 09:45:28 -0700
From: David Daney <ddaney@...iumnetworks.com>
To: Arnd Bergmann <arnd@...db.de>
CC: David Daney <ddaney.cavm@...il.com>, <linux-mips@...ux-mips.org>,
<ralf@...ux-mips.org>, Jamie Iles <jamie@...ieiles.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Jiri Slaby <jslaby@...e.cz>, <linux-serial@...r.kernel.org>,
<linux-kernel@...r.kernel.org>,
David Daney <david.daney@...ium.com>
Subject: Re: [PATCH 3/5] tty/8250_dw: Add support for OCTEON UARTS.
On 06/19/2013 03:01 AM, Arnd Bergmann wrote:
> On Tuesday 18 June 2013 12:12:53 David Daney wrote:
>> +static unsigned int dw8250_serial_inq(struct uart_port *p, int offset)
>> +{
>> + offset <<= p->regshift;
>> +
>> + return (u8)__raw_readq(p->membase + offset);
>> +}
>> +
>> +static void dw8250_serial_outq(struct uart_port *p, int offset, int value)
>> +{
>> + struct dw8250_data *d = p->private_data;
>> +
>> + if (offset == UART_LCR)
>> + d->last_lcr = value;
>> +
>> + offset <<= p->regshift;
>> + __raw_writeq(value, p->membase + offset);
>> + dw8250_serial_inq(p, UART_LCR);
>> +}
>
> This breaks building on 32 bit architectures as I found on my daily ARM
> builds: __raw_writeq cannot be defined on architectures that don't have
> native 64 bit data access instructions.
I will rework the patch to avoid this problem.
> It's also wrong to use the
> __raw_* variant, which is not guaranteed to be atomic and is not
> endian-safe.
We do runtime probing and only use this function on platforms where it
is appropriate, so atomicity is not an issue. As for endianess, I used
the __raw_ variant precisely because it is correct for both big and
little endian kernels.
David Daney
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