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Message-ID: <1371712491-31070-1-git-send-email-jagarwal@nvidia.com>
Date: Thu, 20 Jun 2013 12:44:51 +0530
From: Jay Agarwal <jagarwal@...dia.com>
To: <linux@....linux.org.uk>, <swarren@...dotorg.org>,
<thierry.reding@...onic-design.de>, <bhelgaas@...gle.com>,
<ldewangan@...dia.com>, <olof@...om.net>, <hdoyu@...dia.com>,
<pgaikwad@...dia.com>, <mturquette@...aro.org>,
<pdeschrijver@...dia.com>, <linux-arm-kernel@...ts.infradead.org>,
<linux-tegra@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-pci@...r.kernel.org>
CC: <jtukkinen@...dia.com>, <kthota@...dia.com>, <jagarwal@...dia.com>
Subject: [PATCH V1] ARM: dts: tegra: Modify pcie memory space size
- decrease non-prefetch memory size to 128 MB
- increase prefetch memory size to 384 MB
- above change is done because most pcie devices
prefetch memory size requirement is quite higher
compared to non-prefetch memory space.
Signed-off-by: Jay Agarwal <jagarwal@...dia.com>
---
Patch is based on remotes/gitorious_thierryreding_linux/tegra/next and should be applied on top of this
arch/arm/boot/dts/tegra20.dtsi | 4 ++--
arch/arm/boot/dts/tegra30.dtsi | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi
index fd2a7e1..e09e97f 100644
--- a/arch/arm/boot/dts/tegra20.dtsi
+++ b/arch/arm/boot/dts/tegra20.dtsi
@@ -483,8 +483,8 @@
ranges = <0x82000000 0 0x80000000 0x80000000 0 0x00001000 /* port 0 registers */
0x82000000 0 0x80001000 0x80001000 0 0x00001000 /* port 1 registers */
0x81000000 0 0 0x82000000 0 0x00010000 /* downstream I/O */
- 0x82000000 0 0xa0000000 0xa0000000 0 0x10000000 /* non-prefetchable memory */
- 0xc2000000 0 0xb0000000 0xb0000000 0 0x10000000>; /* prefetchable memory */
+ 0x82000000 0 0xa0000000 0xa0000000 0 0x08000000 /* non-prefetchable memory */
+ 0xc2000000 0 0xa8000000 0xa8000000 0 0x18000000>; /* prefetchable memory */
clocks = <&tegra_car 70>, <&tegra_car 72>, <&tegra_car 74>,
<&tegra_car 118>;
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index e0b96bd..b02bbb4 100644
--- a/arch/arm/boot/dts/tegra30.dtsi
+++ b/arch/arm/boot/dts/tegra30.dtsi
@@ -35,8 +35,8 @@
0x82000000 0 0x00001000 0x00001000 0 0x00001000 /* port 1 configuration space */
0x82000000 0 0x00004000 0x00004000 0 0x00001000 /* port 2 configuration space */
0x81000000 0 0 0x02000000 0 0x00010000 /* downstream I/O */
- 0x82000000 0 0x20000000 0x20000000 0 0x10000000 /* non-prefetchable memory */
- 0xc2000000 0 0x30000000 0x30000000 0 0x10000000>; /* prefetchable memory */
+ 0x82000000 0 0x20000000 0x20000000 0 0x08000000 /* non-prefetchable memory */
+ 0xc2000000 0 0x28000000 0x28000000 0 0x18000000>; /* prefetchable memory */
clocks = <&tegra_car 70>, <&tegra_car 72>, <&tegra_car 74>,
<&tegra_car 118>, <&tegra_car 215>;
--
1.7.0.4
--
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