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Date:	Sat, 22 Jun 2013 17:42:43 +0000
From:	Seiji Aguchi <seiji.aguchi@....com>
To:	Steven Rostedt <rostedt@...dmis.org>,
	LKML <linux-kernel@...r.kernel.org>
CC:	"H. Peter Anvin" <hpa@...ux.intel.com>,
	Ingo Molnar <mingo@...nel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Andrew Morton <akpm@...ux-foundation.org>
Subject: RE: [PATCH][GIT PULL] trace,x86: Move creation of irq tracepoints
 from apic.c to irq.c

> +static inline void load_current_idt(void)
> +{
> +       unsigned long flags;
> +
> +       local_irq_save(flags);
> +       if (is_debug_idt_enabled())
> +               load_debug_idt();
> +       else
> +               load_idt((const struct desc_ptr *)&idt_descr);
> +       local_irq_restore(flags);
> +}
> 
> It's not safe to call local_irq_save() here. From entry_64.S:
> 
> .macro TRACE_IRQS_OFF_DEBUG
> 	call debug_stack_set_zero
> 	TRACE_IRQS_OFF
> 	call debug_stack_reset
> .endm
> 
> We must change the idt before we can trace irqs being disabled. The
> local_irq_save() here is going to be traced by lockdep. Why do we need
> to disable interrupts? It's pretty pointless since this same code can be
> called by NMIs.

OK, I agree to remove the local_irq_save().

I thought it is safe to disable interrupt to avoid potential races, 
because the load_current_id() is a common function and someone else may use it near future.

Per Intel's Software Developer's manual, there is a case which we should disable interrupts
to switch IDT in IA-32e Mode.
But I think it is corner case.

<snip>
9.8.5.2 IA-32e Mode Interrupts and Exceptions
Software must not allow exceptions or interrupts to occur between the time IA-32e mode is activated and the
update of the interrupt-descriptor-table register (IDTR) that establishes references to a 64-bit interrupt-descriptor
table (IDT). This is because the IDT remains in legacy form immediately after IA-32e mode is activated.
If an interrupt or exception occurs prior to updating the IDTR, a legacy 32-bit interrupt gate will be referenced and
interpreted as a 64-bit interrupt gate with unpredictable results. External interrupts can be disabled by using the
CLI instruction.
Non-maskable interrupts (NMI) must be disabled using external hardware.
<snip>

Seiji



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