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Message-ID: <20130625072338.GA12190@gmail.com>
Date: Tue, 25 Jun 2013 09:23:38 +0200
From: Ingo Molnar <mingo@...nel.org>
To: Andi Kleen <andi@...stfloor.org>
Cc: linux-kernel@...r.kernel.org, eranian@...gle.com,
peterz@...radead.org, Andi Kleen <ak@...ux.jf.intel.com>
Subject: Re: [PATCH] perf, x86: Support full width counting v3
* Ingo Molnar <mingo@...nel.org> wrote:
> Looks good - the changelog needs more work: please first outline the
> current behavior (how we can only write 32 bit values into the counter,
> even though the counter range is larger on most CPUs).
>
> Then also outline the Haswell problems more precisely. What happens,
> why, with what probability and why do we care?
For the latter it's enough to put a reference like this into the
changelog:
See the patch "perf/x86/intel: Avoid checkpointed counters causing
excessive TSX aborts" for more details.
Thanks,
Ingo
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