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Message-ID: <alpine.DEB.2.02.1306251559160.4013@ionos.tec.linutronix.de>
Date:	Tue, 25 Jun 2013 16:00:25 +0200 (CEST)
From:	Thomas Gleixner <tglx@...utronix.de>
To:	Srinivas KANDAGATLA <srinivas.kandagatla@...com>
cc:	John Stultz <john.stultz@...aro.org>,
	Grant Likely <grant.likely@...aro.org>,
	Rob Herring <rob.herring@...xeda.com>,
	Rob Landley <rob@...dley.net>,
	devicetree-discuss@...ts.ozlabs.org, linux-doc@...r.kernel.org,
	linux-kernel@...r.kernel.org,
	Linus Walleij <linus.walleij@...aro.org>,
	Stuart Menefy <stuart.menefy@...com>,
	Arnd Bergmann <arnd@...db.de>,
	Rob Herring <robherring2@...il.com>,
	Will Deacon <will.deacon@....com>
Subject: Re: [PATCH v6] clocksource:arm_global_timer: Add ARM global timer
 support.

On Tue, 25 Jun 2013, Srinivas KANDAGATLA wrote:
> On 25/06/13 14:17, Thomas Gleixner wrote:
> > On Tue, 25 Jun 2013, Srinivas KANDAGATLA wrote:
> >> +static void gt_compare_set(unsigned long delta, int periodic)
> >> +{
> >> +	u64 counter = gt_counter_read();
> >> +	unsigned long ctrl = readl(gt_base + GT_CONTROL);
> > 
> > Why are you reading the control register back over and over? All you
> > need to preserve is the GT_CONTROL_TIMER_ENABLE bit. So you can spare
> > that read out and just do
> > 
> > 	ctrl = GT_CONTROL_TIMER_ENABLE;
> > 	writel(ctrl, gt_base + GT_CONTROL);
> 
> Logically you are right we could do as you suggested, However its not
> implicit that which bits are going to be cleared. Its more to do with
> readability of the code.
> If you still insist I can change it.

I'm not insisting. I just pointed out, that you can save cycles in a
hotpath. :)

Thanks,

	tglx
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