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Message-ID: <20130625141556.2f9de7b1@jbarnes-desktop>
Date: Tue, 25 Jun 2013 14:15:56 -0700
From: Jesse Barnes <jbarnes@...tuousgeek.org>
To: Mika Westerberg <mika.westerberg@...ux.intel.com>
Cc: Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
"Rafael J. Wysocki" <rafael.j.wysocki@...el.com>,
Yinghai Lu <yinghai@...nel.org>, john.ronciak@...el.com,
miles.j.penner@...el.com, bruce.w.allan@...el.com,
"Kirill A. Shutemov" <kirill.shutemov@...ux.intel.com>,
Heikki Krogerus <heikki.krogerus@...ux.intel.com>,
linux-kernel@...r.kernel.org, linux-pci@...r.kernel.org,
x86@...nel.org
Subject: Re: [PATCH 6/6] x86/PCI: quirk Thunderbolt PCI-to-PCI bridges
On Tue, 25 Jun 2013 19:22:10 +0300
Mika Westerberg <mika.westerberg@...ux.intel.com> wrote:
> + if (!(pci_probe & PCI_NOASSIGN_ROMS)) {
> + pr_info("Thunderbolt host router detected disabling ROMs\n");
> + pci_probe |= PCI_NOASSIGN_ROMS;
> + }
I wonder if this should just be the default on x86? Or do we allocate
ROM space to address some other platform where we need it and the BIOS
doesn't do it for the devices we care about?
--
Jesse Barnes, Intel Open Source Technology Center
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