linux-kernel - [tip:irq/core] genirq: generic-chip: Export some irq_gc

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Date:	Fri, 28 Jun 2013 03:58:44 -0700
From:	tip-bot for Fabio Estevam <tipbot@...or.com>
To:	linux-tip-commits@...r.kernel.org
Cc:	linux-kernel@...r.kernel.org, hpa@...or.com, mingo@...nel.org,
	fabio.estevam@...escale.com, tglx@...utronix.de, festevam@...il.com
Subject: [tip:irq/core] genirq: generic-chip:
  Export some irq_gc_ functions

Commit-ID:  d55f0cc4c9a70e3105f1e813ab5f221a65ac2ec3
Gitweb:     http://git.kernel.org/tip/d55f0cc4c9a70e3105f1e813ab5f221a65ac2ec3
Author:     Fabio Estevam <festevam@...il.com>
AuthorDate: Fri, 28 Jun 2013 00:23:09 -0300
Committer:  Thomas Gleixner <tglx@...utronix.de>
CommitDate: Fri, 28 Jun 2013 12:56:04 +0200

genirq: generic-chip: Export some irq_gc_ functions

When building imx_v6_v7_defconfig with imx-drm drivers selected as
modules, we get the following build errors:

ERROR: "irq_gc_mask_clr_bit" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_gc_mask_set_bit" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined!
ERROR: "irq_gc_ack_set_bit" [drivers/staging/imx-drm/ipu-v3/imx-ipu-v3.ko] undefined!

Export the required functions to avoid this problem.

Signed-off-by: Fabio Estevam <fabio.estevam@...escale.com>
Cc: shawn.guo@...aro.org
Cc: kernel@...gutronix.de
Link: http://lkml.kernel.org/r/1372389789-7048-1-git-send-email-festevam@gmail.com
Signed-off-by: Thomas Gleixner <tglx@...utronix.de>
---
 kernel/irq/generic-chip.c | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/kernel/irq/generic-chip.c b/kernel/irq/generic-chip.c
index a746a8f..76ea748 100644
--- a/kernel/irq/generic-chip.c
+++ b/kernel/irq/generic-chip.c
@@ -62,6 +62,7 @@ void irq_gc_mask_set_bit(struct irq_data *d)
 	irq_reg_writel(*ct->mask_cache, gc->reg_base + ct->regs.mask);
 	irq_gc_unlock(gc);
 }
+EXPORT_SYMBOL_GPL(irq_gc_mask_set_bit);
 
 /**
  * irq_gc_mask_set_mask_bit - Mask chip via clearing bit in mask register
@@ -81,6 +82,7 @@ void irq_gc_mask_clr_bit(struct irq_data *d)
 	irq_reg_writel(*ct->mask_cache, gc->reg_base + ct->regs.mask);
 	irq_gc_unlock(gc);
 }
+EXPORT_SYMBOL_GPL(irq_gc_mask_clr_bit);
 
 /**
  * irq_gc_unmask_enable_reg - Unmask chip via enable register
@@ -115,6 +117,7 @@ void irq_gc_ack_set_bit(struct irq_data *d)
 	irq_reg_writel(mask, gc->reg_base + ct->regs.ack);
 	irq_gc_unlock(gc);
 }
+EXPORT_SYMBOL_GPL(irq_gc_ack_set_bit);
 
 /**
  * irq_gc_ack_clr_bit - Ack pending interrupt via clearing bit
--
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