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Message-ID: <20130628150941.GA22767@linux-mips.org>
Date: Fri, 28 Jun 2013 17:09:41 +0200
From: Ralf Baechle <ralf@...ux-mips.org>
To: Chen Gang <gang.chen@...anux.com>,
Jörn Engel <joern@...fs.org>
Cc: Chris Metcalf <cmetcalf@...era.com>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Linux-Arch <linux-arch@...r.kernel.org>,
Paul Gortmaker <paul.gortmaker@...driver.com>
Subject: Re: [PATCH] arch: tile: include: asm: add cmpxchg64() definition
On Fri, Jun 28, 2013 at 09:51:35AM +0800, Chen Gang wrote:
> Need add cmpxchg64(), or will cause compiling issue.
>
> Just define it as cmpxchg(), since cmpxchg() can support 8 bytes.
>
> The related error (with allmodconfig):
>
> drivers/block/blockconsole.c: In function ‘bcon_advance_console_bytes’:
> drivers/block/blockconsole.c:164:2: error: implicit declaration of function ‘cmpxchg64’ [-Werror=implicit-function-declaration]
>
> Signed-off-by: Chen Gang <gang.chen@...anux.com>
> ---
> arch/tile/include/asm/cmpxchg.h | 2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/arch/tile/include/asm/cmpxchg.h b/arch/tile/include/asm/cmpxchg.h
> index 276f067..7688c28 100644
> --- a/arch/tile/include/asm/cmpxchg.h
> +++ b/arch/tile/include/asm/cmpxchg.h
> @@ -68,6 +68,8 @@ extern unsigned long __cmpxchg_called_with_bad_pointer(void);
>
> #define tas(ptr) (xchg((ptr), 1))
>
> +#define cmpxchg64(ptr, o, n) cmpxchg((ptr), (o), (n))
that's broken. cmpxchg64 is suposed to work on 64 bit operands ONLY. This
definition (used by MIPS and Alpha) will work properly:
#define cmpxchg64(ptr, o, n) \
({ \
BUILD_BUG_ON(sizeof(*(ptr)) != 8); \
cmpxchg((ptr), (o), (n)); \
})
This should cure blockconsole on Tile but not on MIPS.
struct blockconsole {
...
u64 console_bytes;
...
};
static void bcon_advance_console_bytes(struct blockconsole *bc, int bytes)
{
u64 old, new;
...
} while (cmpxchg64(&bc->console_bytes, old, new) != old);
}
So it's using cmpxchg64() to operate on 64 bit objects - but that's not
going to work on every architecture. Many 32 bit architectures only
provide atomic operations that operate on 32 bit quantities.
Ralf
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