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Message-ID: <51D1EC8C.4050101@codeaurora.org>
Date: Mon, 01 Jul 2013 13:54:36 -0700
From: Stephen Boyd <sboyd@...eaurora.org>
To: Thomas Gleixner <tglx@...utronix.de>
CC: Stehle Vincent-B46079 <B46079@...escale.com>,
"linux-next@...r.kernel.org" <linux-next@...r.kernel.org>,
John Stultz <john.stultz@...aro.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
Mark Rutland <mark.rutland@....com>
Subject: Re: next-20130627 breaks i.MX6 sabre sd UART console
On 07/01/13 13:14, Thomas Gleixner wrote:
> The issue is very subtle. What happens is:
>
> CPU0 CPU1
>
> Switch to oneshot mode
>
> Copy the bits from tick_broadcast_mask to
> tick_broadcast_oneshot_mask. We need to do
> that so the other cpus reach the timer irq
> and the softirq which switches them to
> oneshot.
>
> Kick the broadcast device into oneshot.
>
> Timer interrupt fires
>
> irq_enter sees the cpu in
> tick_broadcast_oneshot_mask and
> sets the device to oneshot mode
>
> handle_periodic:
> Sees oneshot mode and adds
> period to
> dev->next_event(KTIME_MAX)
>
Yep. It is also racing with the timer interrupt so having more than two
CPUs must help widen the window (which is why we see it on the higher
numbered CPUs).
>
> So we need two fixes:
>
> 1) The replacement of the dummy timer and the effect on the broadcast
> mask/device
>
> 2) tick_check_oneshot_broadcast needs a sanity check
>
> Patch below.
Looks good.
Reviewed-by: Stephen Boyd <sboyd@...eaurora.org>
One minor typo in the comment below.
> + switch (tick_broadcast_device.mode) {
> + case TICKDEV_MODE_ONESHOT:
> + /*
> + * If the system is in oneshot mode we can
> + * unconditionally clear the oneshot mask,
> + * because the CPU is running and therefor not
s/therefor/therefore/
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