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Message-ID: <20130702094404.GL3352@arwen.pp.htv.fi>
Date:	Tue, 2 Jul 2013 12:44:04 +0300
From:	Felipe Balbi <balbi@...com>
To:	Mark Brown <broonie@...nel.org>
CC:	Sourav Poddar <sourav.poddar@...com>,
	<spi-devel-general@...ts.sourceforge.net>,
	<grant.likely@...aro.org>, <balbi@...com>, <rnayak@...com>,
	<linux-omap@...r.kernel.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCHv2] drivers: spi: Add qspi flash controller

Hi,

On Tue, Jul 02, 2013 at 10:32:47AM +0100, Mark Brown wrote:
> On Tue, Jul 02, 2013 at 02:26:39PM +0530, Sourav Poddar wrote:
> 
> > 1. Placed pm specific calls in prepare/unprepare apis.
> > 2. Put a mask to support upto 32 bits word length.
> 
> Does this hardware really support anything other than 8 bits per word?
> There is no code in the driver which pays any attention to the word
> size...

the HW has a 128-bit shift register ;-) but driver doesn't look
complete.

-- 
balbi

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