linux-kernel - Re: [PATCHv2] drivers: spi: Add qspi flash controller

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Message-ID: <20130702101718.GE27646@sirena.org.uk>
Date:	Tue, 2 Jul 2013 11:17:18 +0100
From:	Mark Brown <broonie@...nel.org>
To:	Felipe Balbi <balbi@...com>
Cc:	Sourav Poddar <sourav.poddar@...com>,
	spi-devel-general@...ts.sourceforge.net, grant.likely@...aro.org,
	rnayak@...com, linux-omap@...r.kernel.org,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCHv2] drivers: spi: Add qspi flash controller

On Tue, Jul 02, 2013 at 12:44:04PM +0300, Felipe Balbi wrote:
> On Tue, Jul 02, 2013 at 10:32:47AM +0100, Mark Brown wrote:

> > Does this hardware really support anything other than 8 bits per word?
> > There is no code in the driver which pays any attention to the word
> > size...

> the HW has a 128-bit shift register ;-) but driver doesn't look
> complete.

That's not the issue - remember that SPI specifies big endian byte
ordering for words on the bus so things will need to be reordered by the
hardware for anything except 8 bits.

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