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Date:	Mon, 8 Jul 2013 22:18:08 +0530
From:	Viresh Kumar <viresh.kumar@...aro.org>
To:	Uwe Kleine-König 
	<u.kleine-koenig@...gutronix.de>
Cc:	tj@...nel.org, davem@...emloft.net, airlied@...hat.com,
	axboe@...nel.dk, tglx@...utronix.de, peterz@...radead.org,
	mingo@...hat.com, rostedt@...dmis.org,
	linux-rt-users@...r.kernel.org, linux-kernel@...r.kernel.org,
	robin.randhawa@....com, Steve.Bannister@....com, Livi@...per.es
Subject: Re: [PATCH V5 0/5] Queue work on power efficient wq

On 8 July 2013 21:27, Uwe Kleine-König <u.kleine-koenig@...gutronix.de> wrote:
> On Mon, Jul 08, 2013 at 09:17:01PM +0530, Viresh Kumar wrote:

>> Well, big LITTLE still runs an SMP kernel :) and so has this flag set.
> The 'S' is justified because cpu0 and cpu1 are of the same type? Are
> there b.L systems that have only one big and one LITTLE cpu? Do these
> use SMP, too?

Following definition of SMP says:
http://en.wikipedia.org/wiki/Symmetric_Multiprocessor

A system is SMP when:
- It has same type of cores
- controlled by a single instance of OS.

In big LITTLE first one is obviously not completely true as you pointed out.
But second one is and so I would say its an SMP system :)

Don't know how it should be called though.

>> You can make it dependent on that if required.
> Well, it's not required. It's just that the corresponding question in
> make oldconfig isn't really an enrichment for a kernel targeting an
> Cortex M3 :-)

Just to make it clear enough, you are saying it doesn't make any
sense to enable it for M3? But because it is disabled by default,
the problem is not seen?

Why? Can't we have two M3's on a SoC and run an SMP kernel over
it?

--
viresh
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