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Message-ID: <CABPqkBQEWZ05_mKLDZ1r+_VO6QzD=cWAb=xFXGEpmOMXG7mgOw@mail.gmail.com>
Date: Mon, 8 Jul 2013 22:56:38 +0200
From: Stephane Eranian <eranian@...gle.com>
To: Andi Kleen <ak@...ux.jf.intel.com>
Cc: Dave Hansen <dave@...1.net>, Dave Hansen <dave.hansen@...el.com>,
LKML <linux-kernel@...r.kernel.org>,
Peter Zijlstra <peterz@...radead.org>,
"mingo@...e.hu" <mingo@...e.hu>, dave.hansen@...ux.jf.intel.com,
Jiri Olsa <jolsa@...hat.com>
Subject: Re: [PATCH] perf: fix interrupt handler timing harness
On Mon, Jul 8, 2013 at 10:54 PM, Andi Kleen <ak@...ux.jf.intel.com> wrote:
>> I did a quite a bit of ftracing to look for spots inside the handler
>> which were taking large amounts of time. There were none. The
>> execution time was spread very evenly over the entire nmi handler. It
>> didn't appear to be any individual hot cachelines or doing something
>> silly like sitting in a loop handling lots of PMU events.
>
> In some cases callgraphs seemed to be quite expensive (large fraction
> of the handler time)
>
In my case, I am not doing callgraphs, just regular cycles.
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