linux-kernel - Re: [PATCH] pci: exynos: split into two parts such as Synopsys part and Exynos part

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Date:	Wed, 10 Jul 2013 19:32:04 +0530
From:	Kishon Vijay Abraham I <kishon@...com>
To:	Jingoo Han <jg1.han@...sung.com>
CC:	"'Bjorn Helgaas'" <bhelgaas@...gle.com>,
	<linux-pci@...r.kernel.org>, <linux-samsung-soc@...r.kernel.org>,
	"'Kukjin Kim'" <kgene.kim@...sung.com>,
	Pratyush Anand <pratyush.anand@...com>,
	Mohit KUMAR <Mohit.KUMAR@...com>,
	"'Arnd Bergmann'" <arnd@...db.de>,
	"'Sean Cross'" <xobs@...agi.com>,
	"'SRIKANTH TUMKUR SHIVANAND'" <ts.srikanth@...sung.com>,
	<linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] pci: exynos: split into two parts such as Synopsys part
 and Exynos part

Hi,

On Friday 05 July 2013 01:59 PM, Jingoo Han wrote:
> Exynos PCIe IP consists of Synopsys specific part and Exynos
> specific part. Only core block is a Synopsys designware part;
> other parts are Exynos specific.
> Also, the Synopsys designware part can be shared with other
> platforms; thus, it can be split two parts such as Synopsys
> designware part and Exynos specific part.

Thanks for doing that :-)

I'll be using the synopsys specific part as Jacinto6 also uses the same pcie
core. Once I start implementing, I'll have some queries and comments ;-)

Cheers
Kishon
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