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Message-ID: <alpine.LNX.2.00.1307112141151.29788@pobox.suse.cz>
Date: Thu, 11 Jul 2013 21:43:42 +0200 (CEST)
From: Jiri Kosina <jkosina@...e.cz>
To: Steven Rostedt <rostedt@...dmis.org>
Cc: Masami Hiramatsu <masami.hiramatsu.pt@...achi.com>,
"H. Peter Anvin" <hpa@...ux.intel.com>,
Borislav Petkov <bpetkov@...e.de>,
linux-kernel@...r.kernel.org, Jason Baron <jbaron@...mai.com>
Subject: Re: [RFC] [PATCH 1/2 v2] x86: introduce int3-based instruction
patching
On Thu, 11 Jul 2013, Steven Rostedt wrote:
[ .. snip .. ]
> > + smp_wmb();
> > +
> > + text_poke(addr, &int3, sizeof(int3));
> > +
> > + if (len - sizeof(int3) > 0) {
>
> I believe we need a sync here. Otherwise, if the instruction crosses
> cache lines, the original first byte could have been pulled in, and then
> after the text_poke() below, it gets the updated version, causing a
> crash on that CPU.
>
> on_each_cpu(do_sync_core, NULL, 1);
Right you are.
OTOH we apparently don't need the one after the text_poke() below, as
syncing the cores just after patching the first byte afterwards provides
safe enough guard (at least according to hpa's words back in 2010 :) ).
Will change it for next respin of the patchset, thanks for review.
--
Jiri Kosina
SUSE Labs
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