linux-kernel - Re: [PATCH 1/2 v3] x86: introduce int3-based instruction patching

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Message-ID: <20130712075738.GB24008@pd.tnic>
Date:	Fri, 12 Jul 2013 09:57:38 +0200
From:	Borislav Petkov <bp@...en8.de>
To:	"H. Peter Anvin" <hpa@...ux.intel.com>
Cc:	Jiri Kosina <jkosina@...e.cz>,
	Masami Hiramatsu <masami.hiramatsu.pt@...achi.com>,
	Steven Rostedt <rostedt@...dmis.org>,
	Jason Baron <jbaron@...mai.com>, Joe Perches <joe@...ches.com>,
	linux-kernel@...r.kernel.org
Subject: Re: [PATCH 1/2 v3] x86: introduce int3-based instruction patching

On Thu, Jul 11, 2013 at 02:36:38PM -0700, H. Peter Anvin wrote:
> On 07/11/2013 02:04 PM, Borislav Petkov wrote:
> > On Thu, Jul 11, 2013 at 01:53:16PM -0700, H. Peter Anvin wrote:
> >> Has anyone talked to AMD or VIA about this at all?
> > 
> > I guess I can try to take care of the AMD part. Just to confirm, is this
> > the exact sequence we're interested in:
> > 
> > 1. Setup int3 handler for fixup.
> > 
> > 2. Put a breakpoint (int3) on the first byte of modifying region, and
> > synchronize code on all CPUs.
> > 
> > 3. Modify other bytes of modifying region.
> > 
> > 4. Modify the first byte of modifying region, and synchronize code on
> > all CPUs.
> > 
> > 5. Clear int3 handler.
> > 
> > If a suitable int3 handler is left permanently in place then the
> > synchronization in step 4 is unnecessary.
> > 
> 
> Correct.

Right, above sequence would work on AMD.

-- 
Regards/Gruss,
    Boris.

Sent from a fat crate under my desk. Formatting is fine.
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