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Message-ID: <51E5C65A.9010605@zytor.com>
Date:	Tue, 16 Jul 2013 15:16:58 -0700
From:	"H. Peter Anvin" <hpa@...or.com>
To:	Yinghai Lu <yinghai@...nel.org>
CC:	Kees Cook <keescook@...omium.org>,
	Steven Rostedt <rostedt@...dmis.org>,
	Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
	Thomas Gleixner <tglx@...utronix.de>,
	Ingo Molnar <mingo@...hat.com>,
	the arch/x86 maintainers <x86@...nel.org>,
	Seiji Aguchi <seiji.aguchi@....com>,
	Fenghua Yu <fenghua.yu@...el.com>,
	Frederic Weisbecker <fweisbec@...il.com>,
	"Paul E. McKenney" <paulmck@...ux.vnet.ibm.com>,
	Suresh Siddha <suresh.b.siddha@...el.com>,
	PaX Team <pageexec@...il.com>
Subject: Re: [PATCH v5] x86: make sure IDT is page aligned

On 07/16/2013 03:13 PM, Yinghai Lu wrote:
> 
> ok, then should change
> 
>> +/* No need to be aligned, but done to keep all IDTs defined the same way. */
>> +gate_desc trace_idt_table[NR_VECTORS] __page_aligned_bss;
> 
> ==>
> 
>> +/* Only need to be cacheline aligned, but keep all IDTs defined the same way to be page aligned. */
>> +gate_desc trace_idt_table[NR_VECTORS] __page_aligned_bss;

It doesn't need to be cacheline aligned, either, to the best of my
knowledge.  The former comment is more correct.

	-hpa

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