lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
Open Source and information security mailing list archives
| ||
|
Date: Thu, 18 Jul 2013 16:27:31 +0800 From: "Yan, Zheng" <zheng.z.yan@...el.com> To: Peter Zijlstra <peterz@...radead.org> CC: linux-kernel@...r.kernel.org, mingo@...e.hu, eranian@...gle.com, ak@...ux.intel.com Subject: Re: [PATCH] perf, x86: Add Silvermont (22nm Atom) support On 07/18/2013 04:23 PM, Peter Zijlstra wrote: > On Thu, Jul 18, 2013 at 01:36:07PM +0800, Yan, Zheng wrote: >> +static struct event_constraint intel_slm_event_constraints[] __read_mostly = >> +{ >> + FIXED_EVENT_CONSTRAINT(0x00c0, 0), /* INST_RETIRED.ANY */ >> + FIXED_EVENT_CONSTRAINT(0x003c, 1), /* CPU_CLK_UNHALTED.CORE */ >> + FIXED_EVENT_CONSTRAINT(0x013c, 2), /* CPU_CLK_UNHALTED.REF */ >> + FIXED_EVENT_CONSTRAINT(0x0300, 2), /* pseudo CPU_CLK_UNHALTED.REF */ > > So the normal event 0x13c and the fixed counter 2 are normally _not_ the > same. Are they for slm? Are you sure? > yes, I'm sure. see page 15-15 of http://www.intel.com/content/dam/www/public/us/en/documents/manuals/64-ia-32-architectures-optimization-manual.pdf Regards Yan, Zheng -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majordomo@...r.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Powered by blists - more mailing lists