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Message-ID: <51E9197F.7010608@ti.com>
Date:	Fri, 19 Jul 2013 16:18:31 +0530
From:	Sricharan R <r.sricharan@...com>
To:	Tony Lindgren <tony@...mide.com>
CC:	Santosh Shilimkar <santosh.shilimkar@...com>,
	Nishanth Menon <nm@...com>, <balbi@...com>,
	<linux@....linux.org.uk>, <linux-doc@...r.kernel.org>,
	<devicetree-discuss@...ts.ozlabs.org>, <rnayak@...com>,
	<linux-kernel@...r.kernel.org>, <linux-omap@...r.kernel.org>,
	<linux-arm-kernel@...ts.infradead.org>,
	Linus Walleij <linus.walleij@...aro.org>
Subject: Re: [PATCH 1/3] misc: Add crossbar driver

On Friday 19 July 2013 12:47 PM, Tony Lindgren wrote:
>> On Thursday 18 July 2013 02:56 PM, Nishanth Menon wrote:
>>
>> Since the cross-bar is not limited t0 IRQ lines and applicable for
>> DMA request lines as well, making it IRQ chip doesn't make sense. Its
>> not typical pin control functionality either but at least that framework
>> is much closer to consider as an option.
>>
>> Actually its more of setting up the IRQ and DMA pins maps once
>> at boot for a given SOC based on chosen configuration by the
>> board. So I am leaning towards pinctrl as well. Just haven't
>> thought enough about whether thats the best approach.
>>
>> CC'ing Linus W and Tony L whether we can use pinctrl framework
>> for such an IP and if yes how ;-).
> If it really muxes signals then using pinctrl seems logical.
> Especially if the registers are in the SCM block.
>
> It might be already possible to handle it already with
> pinctrl-single,bits for the muxing part.
 I also thought of using the pinctrl itself.
 But then i wanted  to have the error handling as well,
 hence did this.

Regards,
 Sricharan
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