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Date: Fri, 19 Jul 2013 10:16:44 -0700
From: Soren Brinkmann <soren.brinkmann@...inx.com>
To: Mike Turquette <mturquette@...aro.org>,
Michal Simek <michal.simek@...inx.com>
Cc: Srikanth Thokala <sthokal@...inx.com>,
linux-kernel@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
Soren Brinkmann <soren.brinkmann@...inx.com>
Subject: [PATCH 1/2] clk/zynq/pll: Fix documentation for PLL register function
Signed-off-by: Soren Brinkmann <soren.brinkmann@...inx.com>
---
drivers/clk/zynq/pll.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/zynq/pll.c b/drivers/clk/zynq/pll.c
index 47e307c..67f1b5e 100644
--- a/drivers/clk/zynq/pll.c
+++ b/drivers/clk/zynq/pll.c
@@ -182,7 +182,12 @@ static const struct clk_ops zynq_pll_ops = {
/**
* clk_register_zynq_pll() - Register PLL with the clock framework
- * @np Pointer to the DT device node
+ * @name PLL name
+ * @parent Parent clock name
+ * @pll_ctrl Pointer to PLL control register
+ * @pll_status Pointer to PLL status register
+ * @lock_index Bit index to this PLL's lock status bit in @pll_status
+ * @lock Register lock
*/
struct clk *clk_register_zynq_pll(const char *name, const char *parent,
void __iomem *pll_ctrl, void __iomem *pll_status, u8 lock_index,
--
1.8.3.3
--
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