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Message-Id: <1374501138-13496-2-git-send-email-andi@firstfloor.org>
Date: Mon, 22 Jul 2013 06:52:18 -0700
From: Andi Kleen <andi@...stfloor.org>
To: acme@...radead.org
Cc: mingo@...nel.org, linux-kernel@...r.kernel.org,
Andi Kleen <ak@...ux.intel.com>, eranian@...gle.com
Subject: [PATCH 2/2] perf, x86: Enable PEBS mode automatically for mem-{loads,stores} v4
From: Andi Kleen <ak@...ux.intel.com>
With the earlier patches to automatically try cpu// and add
a precise sys attribute, we can now enable PEBS for the mem-loads,
mem-stores events everywhere.
This allows to use
perf record -e mem-loads ...
instead of
perf record -e cpu/mem-loads/p ...
Always use precise=2 even though it is costly pre-Haswell
Cc: eranian@...gle.com
v2: Different white space
v3: Always use precise=2, as people seem to think overhead doesn't matter.
v4: Longer lines
Signed-off-by: Andi Kleen <ak@...ux.intel.com>
---
arch/x86/kernel/cpu/perf_event_intel.c | 11 ++++++-----
1 file changed, 6 insertions(+), 5 deletions(-)
diff --git a/arch/x86/kernel/cpu/perf_event_intel.c b/arch/x86/kernel/cpu/perf_event_intel.c
index fbc9210..1871866 100644
--- a/arch/x86/kernel/cpu/perf_event_intel.c
+++ b/arch/x86/kernel/cpu/perf_event_intel.c
@@ -176,9 +176,9 @@ static struct extra_reg intel_snbep_extra_regs[] __read_mostly = {
EVENT_EXTRA_END
};
-EVENT_ATTR_STR(mem-loads, mem_ld_nhm, "event=0x0b,umask=0x10,ldlat=3");
-EVENT_ATTR_STR(mem-loads, mem_ld_snb, "event=0xcd,umask=0x1,ldlat=3");
-EVENT_ATTR_STR(mem-stores, mem_st_snb, "event=0xcd,umask=0x2");
+EVENT_ATTR_STR(mem-loads, mem_ld_nhm, "event=0x0b,umask=0x10,ldlat=3,precise=2");
+EVENT_ATTR_STR(mem-loads, mem_ld_snb, "event=0xcd,umask=0x1,ldlat=3,precise=2");
+EVENT_ATTR_STR(mem-stores, mem_st_snb, "event=0xcd,umask=0x2,precise=2");
struct attribute *nhm_events_attrs[] = {
EVENT_PTR(mem_ld_nhm),
@@ -2034,8 +2034,9 @@ static __init void intel_nehalem_quirk(void)
}
}
-EVENT_ATTR_STR(mem-loads, mem_ld_hsw, "event=0xcd,umask=0x1,ldlat=3");
-EVENT_ATTR_STR(mem-stores, mem_st_hsw, "event=0xd0,umask=0x82")
+EVENT_ATTR_STR(mem-loads, mem_ld_hsw,
+ "event=0xcd,umask=0x1,ldlat=3,precise=2");
+EVENT_ATTR_STR(mem-stores, mem_st_hsw, "event=0xd0,umask=0x82,precise=2")
static struct attribute *hsw_events_attrs[] = {
EVENT_PTR(mem_ld_hsw),
--
1.8.3.1
--
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