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Message-ID: <20130725135547.GG9858@sirena.org.uk>
Date: Thu, 25 Jul 2013 14:55:47 +0100
From: Mark Brown <broonie@...nel.org>
To: Laurent Pinchart <laurent.pinchart@...asonboard.com>
Cc: Linus Walleij <linus.walleij@...aro.org>,
Benjamin Herrenschmidt <benh@...nel.crashing.org>,
"linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
"linux-gpio@...r.kernel.org" <linux-gpio@...r.kernel.org>,
Grant Likely <grant.likely@...aro.org>,
Guennadi Liakhovetski <g.liakhovetski@....de>,
"linux-arm-kernel@...ts.infradead.org"
<linux-arm-kernel@...ts.infradead.org>
Subject: Re: How to create IRQ mappings in a GPIO driver that doesn't control
its IRQ domain ?
On Thu, Jul 25, 2013 at 03:22:29PM +0200, Laurent Pinchart wrote:
> On Thursday 25 July 2013 14:15:56 Mark Brown wrote:
> > Are the interrupts in a contiguous block in the controller so you can just
> > pass around the controller and a base number?
> In two of the three SoCs I need to fix they are. I've just realized that in
> the last one the interrupts are in two contiguous blocks in two different
> parents. I will thus need at least a list of <parent-phandle base count>. Our
> standard interrupt bindings don't seem to support multiple parents, is that
> something that we want to fix or should I go for custom bindings ?
It seems reasonable to define the bindings in a generic way in case
other people have the same problem but it's possible I may be missing a
trick regarding how to do this in DT so don't take my word for it.
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