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Message-ID: <20130725172616.GA11514@cantiga.alporthouse.com>
Date: Thu, 25 Jul 2013 18:26:16 +0100
From: Chris Wilson <chris@...is-wilson.co.uk>
To: Sedat Dilek <sedat.dilek@...il.com>
Cc: Daniel Vetter <daniel.vetter@...ll.ch>,
Jani Nikula <jani.nikula@...ux.intel.com>,
Stephen Rothwell <sfr@...b.auug.org.au>,
intel-gfx <intel-gfx@...ts.freedesktop.org>,
Linux Kernel Mailing List <linux-kernel@...r.kernel.org>,
DRI <dri-devel@...ts.freedesktop.org>,
linux-next <linux-next@...r.kernel.org>
Subject: Re: [Intel-gfx] linux-next: Tree for Jul 25 [ call-trace: drm |
drm-intel related? ]
On Thu, Jul 25, 2013 at 07:15:03PM +0200, Sedat Dilek wrote:
> On Thu, Jul 25, 2013 at 7:01 PM, Chris Wilson <chris@...is-wilson.co.uk> wrote:
> > Basically boils down to either an object allocation failure or mmaping
> > failure. I think dmesg with drm.debug=7 is the next step.
>
> Attached! Thanks for taking care.
Hmm, looks like i915_gem_map_gtt fails, but no reason given, so can you
please apply this for more debug:
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 0563661..34e09bf 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -1630,24 +1630,29 @@ i915_gem_mmap_gtt(struct drm_file *file,
obj = to_intel_bo(drm_gem_object_lookup(dev, file, handle));
if (&obj->base == NULL) {
+ DRM_DRIVER_DEBUG("Unknown object handle %d\n", handle);
ret = -ENOENT;
goto unlock;
}
if (obj->base.size > dev_priv->gtt.mappable_end) {
+ DRM_DRIVER_DEBUG("Object (%d) larger than mappable aperture (%d) > %d\n",
+ (int)obj->base.size, (int)dev_priv->gtt.mappable_end);
ret = -E2BIG;
goto out;
}
if (obj->madv != I915_MADV_WILLNEED) {
- DRM_ERROR("Attempting to mmap a purgeable buffer\n");
+ DRM_DRIVER_DEBUG("Attempting to mmap a purgeable buffer\n");
ret = -EINVAL;
goto out;
}
ret = i915_gem_object_create_mmap_offset(obj);
- if (ret)
+ if (ret) {
+ DRM_DRIVER_DEBUG("Failed to allocate mmap offset (ret=%d)\n", ret);
goto out;
+ }
*offset = (u64)obj->base.map_list.hash.key << PAGE_SHIFT;
--
Chris Wilson, Intel Open Source Technology Centre
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