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Message-Id: <1374774810-18459-12-git-send-email-thierry.reding@gmail.com>
Date: Thu, 25 Jul 2013 10:53:25 -0700
From: Thierry Reding <thierry.reding@...il.com>
To: Bjorn Helgaas <bhelgaas@...gle.com>,
Stephen Warren <swarren@...dotorg.org>
Cc: Russell King <linux@....linux.org.uk>,
Jason Cooper <jason@...edaemon.net>,
Thomas Petazzoni <thomas.petazzoni@...e-electrons.com>,
Jay Agarwal <jagarwal@...dia.com>, linux-pci@...r.kernel.org,
linux-tegra@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org
Subject: [PATCH v5 11/16] ARM: tegra: Enable PCIe controller on Cardhu
From: Jay Agarwal <jagarwal@...dia.com>
Root port 2 is routed to the bottom connector on Cardhu and is used by
the development dock to provide gigabit ethernet and USB functionality.
Signed-off-by: Jay Agarwal <jagarwal@...dia.com>
Signed-off-by: Thierry Reding <treding@...dia.com>
---
arch/arm/boot/dts/tegra30-cardhu.dtsi | 20 ++++++++++++++++++++
1 file changed, 20 insertions(+)
diff --git a/arch/arm/boot/dts/tegra30-cardhu.dtsi b/arch/arm/boot/dts/tegra30-cardhu.dtsi
index c011b67..ee8fff8 100644
--- a/arch/arm/boot/dts/tegra30-cardhu.dtsi
+++ b/arch/arm/boot/dts/tegra30-cardhu.dtsi
@@ -31,6 +31,26 @@
reg = <0x80000000 0x40000000>;
};
+ pcie-controller {
+ status = "okay";
+ pex-clk-supply = <&pex_hvdd_3v3_reg>;
+ vdd-supply = <&ldo1_reg>;
+ avdd-supply = <&ldo2_reg>;
+
+ pci@1,0 {
+ nvidia,num-lanes = <4>;
+ };
+
+ pci@2,0 {
+ nvidia,num-lanes = <1>;
+ };
+
+ pci@3,0 {
+ status = "okay";
+ nvidia,num-lanes = <1>;
+ };
+ };
+
pinmux {
pinctrl-names = "default";
pinctrl-0 = <&state_default>;
--
1.8.1.5
--
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