lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]
Date:	Fri, 26 Jul 2013 11:12:45 +0200
From:	Peter Zijlstra <peterz@...radead.org>
To:	Prarit Bhargava <prarit@...hat.com>
Cc:	linux-kernel@...r.kernel.org, John Stultz <john.stultz@...aro.org>,
	Dave Hansen <dave@...1.net>, x86@...nel.org
Subject: Re: [PATCH] x86, tsc add an initial read offset to __cycles_2_ns()
 calculations

On Wed, Jul 24, 2013 at 12:03:20PM -0400, Prarit Bhargava wrote:
> 
> The TSC can have non-zero values at boot time on Intel Xeon E5 (family 6,
> model 45) aka "SandyBridge" processors.  This is documented in the Errata
> for the E5 processors as BT81.
> 
> The __cycles_2_ns() calculation is known to overflow if a large value of
> cycles is passed into the function.  This is done by design to improve
> precision for smaller significant digits in the calculation.  Since the E5
> processor can pass in a large value,  we need to snapshot the TSC's
> initial value to avoid calculation overflows in the conversions of cycles
> to nanoseconds.
> 
> Tested successfully on various Sandybridge systems as well as a few older
> and newer systems without any issues.
> 
> Signed-off-by: Prarit Bhargava <prarit@...hat.com>
> Cc: John Stultz <john.stultz@...aro.org>
> Cc: Dave Hansen <dave@...1.net>
> Cc: x86@...nel.org
> ---
>  arch/x86/include/asm/timer.h |   15 +++------------
>  arch/x86/kernel/tsc.c        |   13 +++++++++++++
>  2 files changed, 16 insertions(+), 12 deletions(-)
> 
> diff --git a/arch/x86/include/asm/timer.h b/arch/x86/include/asm/timer.h
> index 34baa0e..f9d666b 100644
> --- a/arch/x86/include/asm/timer.h
> +++ b/arch/x86/include/asm/timer.h
> @@ -12,6 +12,8 @@ extern int recalibrate_cpu_khz(void);
>  
>  extern int no_timer_check;
>  
> +extern unsigned long long tsc_initial_value;
> +
>  /* Accelerators for sched_clock()
>   * convert from cycles(64bits) => nanoseconds (64bits)
>   *  basic equation:
> @@ -59,21 +61,10 @@ static inline unsigned long long __cycles_2_ns(unsigned long long cyc)
>  {
>  	int cpu = smp_processor_id();
>  	unsigned long long ns = per_cpu(cyc2ns_offset, cpu);
> +	cyc -= tsc_initial_value;
>  	ns += mult_frac(cyc, per_cpu(cyc2ns, cpu),
>  			(1UL << CYC2NS_SCALE_FACTOR));
>  	return ns;
>  }

Hurm.. but eventually the TSC value _will_ get that large again, right?
So shouldn't we fix the actual problem?

--
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to majordomo@...r.kernel.org
More majordomo info at  http://vger.kernel.org/majordomo-info.html
Please read the FAQ at  http://www.tux.org/lkml/

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ